1 /*
2 * linux/drivers/ide/ide-dma.c Version 4.10 June 9, 2000
3 *
4 * Copyright (c) 1999-2000 Andre Hedrick <andre@linux-ide.org>
5 * May be copied or modified under the terms of the GNU General Public License
6 */
7
8 /*
9 * Special Thanks to Mark for his Six years of work.
10 *
11 * Copyright (c) 1995-1998 Mark Lord
12 * May be copied or modified under the terms of the GNU General Public License
13 */
14
15 /*
16 * This module provides support for the bus-master IDE DMA functions
17 * of various PCI chipsets, including the Intel PIIX (i82371FB for
18 * the 430 FX chipset), the PIIX3 (i82371SB for the 430 HX/VX and
19 * 440 chipsets), and the PIIX4 (i82371AB for the 430 TX chipset)
20 * ("PIIX" stands for "PCI ISA IDE Xcellerator").
21 *
22 * Pretty much the same code works for other IDE PCI bus-mastering chipsets.
23 *
24 * DMA is supported for all IDE devices (disk drives, cdroms, tapes, floppies).
25 *
26 * By default, DMA support is prepared for use, but is currently enabled only
27 * for drives which already have DMA enabled (UltraDMA or mode 2 multi/single),
28 * or which are recognized as "good" (see table below). Drives with only mode0
29 * or mode1 (multi/single) DMA should also work with this chipset/driver
30 * (eg. MC2112A) but are not enabled by default.
31 *
32 * Use "hdparm -i" to view modes supported by a given drive.
33 *
34 * The hdparm-3.5 (or later) utility can be used for manually enabling/disabling
35 * DMA support, but must be (re-)compiled against this kernel version or later.
36 *
37 * To enable DMA, use "hdparm -d1 /dev/hd?" on a per-drive basis after booting.
38 * If problems arise, ide.c will disable DMA operation after a few retries.
39 * This error recovery mechanism works and has been extremely well exercised.
40 *
41 * IDE drives, depending on their vintage, may support several different modes
42 * of DMA operation. The boot-time modes are indicated with a "*" in
43 * the "hdparm -i" listing, and can be changed with *knowledgeable* use of
44 * the "hdparm -X" feature. There is seldom a need to do this, as drives
45 * normally power-up with their "best" PIO/DMA modes enabled.
46 *
47 * Testing has been done with a rather extensive number of drives,
48 * with Quantum & Western Digital models generally outperforming the pack,
49 * and Fujitsu & Conner (and some Seagate which are really Conner) drives
50 * showing more lackluster throughput.
51 *
52 * Keep an eye on /var/adm/messages for "DMA disabled" messages.
53 *
54 * Some people have reported trouble with Intel Zappa motherboards.
55 * This can be fixed by upgrading the AMI BIOS to version 1.00.04.BS0,
56 * available from ftp://ftp.intel.com/pub/bios/10004bs0.exe
57 * (thanks to Glen Morrell <glen@spin.Stanford.edu> for researching this).
58 *
59 * Thanks to "Christopher J. Reimer" <reimer@doe.carleton.ca> for
60 * fixing the problem with the BIOS on some Acer motherboards.
61 *
62 * Thanks to "Benoit Poulot-Cazajous" <poulot@chorus.fr> for testing
63 * "TX" chipset compatibility and for providing patches for the "TX" chipset.
64 *
65 * Thanks to Christian Brunner <chb@muc.de> for taking a good first crack
66 * at generic DMA -- his patches were referred to when preparing this code.
67 *
68 * Most importantly, thanks to Robert Bringman <rob@mars.trion.com>
69 * for supplying a Promise UDMA board & WD UDMA drive for this work!
70 *
71 * And, yes, Intel Zappa boards really *do* use both PIIX IDE ports.
72 *
73 * check_drive_lists(ide_drive_t *drive, int good_bad)
74 *
75 * ATA-66/100 and recovery functions, I forgot the rest......
76 * SELECT_READ_WRITE(hwif,drive,func) for active tuning based on IO direction.
77 *
78 */
79
80 #include <linux/config.h>
81 #include <linux/types.h>
82 #include <linux/kernel.h>
83 #include <linux/timer.h>
84 #include <linux/mm.h>
85 #include <linux/interrupt.h>
86 #include <linux/pci.h>
87 #include <linux/init.h>
88 #include <linux/ide.h>
89
90 #include <asm/io.h>
91 #include <asm/irq.h>
92
93 #undef CONFIG_BLK_DEV_IDEDMA_TIMEOUT
94
95 extern char *ide_dmafunc_verbose(ide_dma_action_t dmafunc);
96
97 #ifdef CONFIG_IDEDMA_NEW_DRIVE_LISTINGS
98
99 struct drive_list_entry {
100 char * id_model;
101 char * id_firmware;
102 };
103
104 struct drive_list_entry drive_whitelist [] = {
105
106 { "Micropolis 2112A" , "ALL" },
107 { "CONNER CTMA 4000" , "ALL" },
108 { "CONNER CTT8000-A" , "ALL" },
109 { "ST34342A" , "ALL" },
110 { 0 , 0 }
111 };
112
113 struct drive_list_entry drive_blacklist [] = {
114
115 { "WDC AC11000H" , "ALL" },
116 { "WDC AC22100H" , "ALL" },
117 { "WDC AC32500H" , "ALL" },
118 { "WDC AC33100H" , "ALL" },
119 { "WDC AC31600H" , "ALL" },
120 { "WDC AC32100H" , "24.09P07" },
121 { "WDC AC23200L" , "21.10N21" },
122 { 0 , 0 }
123
124 };
125
126 int in_drive_list(struct hd_driveid *id, struct drive_list_entry * drive_table)
127 {
128 for ( ; drive_table->id_model ; drive_table++)
129 if ((!strcmp(drive_table->id_model, id->model)) &&
130 ((!strstr(drive_table->id_firmware, id->fw_rev)) ||
131 (!strcmp(drive_table->id_firmware, "ALL"))))
132 return 1;
133 return 0;
134 }
135
136 #else /* !CONFIG_IDEDMA_NEW_DRIVE_LISTINGS */
137
138 /*
139 * good_dma_drives() lists the model names (from "hdparm -i")
140 * of drives which do not support mode2 DMA but which are
141 * known to work fine with this interface under Linux.
142 */
143 const char *good_dma_drives[] = {"Micropolis 2112A",
144 "CONNER CTMA 4000",
145 "CONNER CTT8000-A",
146 "ST34342A", /* for Sun Ultra */
147 NULL};
148
149 /*
150 * bad_dma_drives() lists the model names (from "hdparm -i")
151 * of drives which supposedly support (U)DMA but which are
152 * known to corrupt data with this interface under Linux.
153 *
154 * This is an empirical list. Its generated from bug reports. That means
155 * while it reflects actual problem distributions it doesn't answer whether
156 * the drive or the controller, or cabling, or software, or some combination
157 * thereof is the fault. If you don't happen to agree with the kernel's
158 * opinion of your drive - use hdparm to turn DMA on.
159 */
160 const char *bad_dma_drives[] = {"WDC AC11000H",
161 "WDC AC22100H",
162 "WDC AC32100H",
163 "WDC AC32500H",
164 "WDC AC33100H",
165 "WDC AC31600H",
166 NULL};
167
168 #endif /* CONFIG_IDEDMA_NEW_DRIVE_LISTINGS */
169
170 /*
171 * Our Physical Region Descriptor (PRD) table should be large enough
172 * to handle the biggest I/O request we are likely to see. Since requests
173 * can have no more than 256 sectors, and since the typical blocksize is
174 * two or more sectors, we could get by with a limit of 128 entries here for
175 * the usual worst case. Most requests seem to include some contiguous blocks,
176 * further reducing the number of table entries required.
177 *
178 * The driver reverts to PIO mode for individual requests that exceed
179 * this limit (possible with 512 byte blocksizes, eg. MSDOS f/s), so handling
180 * 100% of all crazy scenarios here is not necessary.
181 *
182 * As it turns out though, we must allocate a full 4KB page for this,
183 * so the two PRD tables (ide0 & ide1) will each get half of that,
184 * allowing each to have about 256 entries (8 bytes each) from this.
185 */
186 #define PRD_BYTES 8
187 #define PRD_ENTRIES (PAGE_SIZE / (2 * PRD_BYTES))
188
189 /*
190 * dma_intr() is the handler for disk read/write DMA interrupts
191 */
192 ide_startstop_t ide_dma_intr (ide_drive_t *drive)
193 {
194 int i;
195 byte stat, dma_stat;
196
197 dma_stat = HWIF(drive)->dmaproc(ide_dma_end, drive);
198 stat = GET_STAT(); /* get drive status */
199 if (OK_STAT(stat,DRIVE_READY,drive->bad_wstat|DRQ_STAT)) {
200 if (!dma_stat) {
201 struct request *rq = HWGROUP(drive)->rq;
202 rq = HWGROUP(drive)->rq;
203 for (i = rq->nr_sectors; i > 0;) {
204 i -= rq->current_nr_sectors;
205 ide_end_request(1, HWGROUP(drive));
206 }
207 return ide_stopped;
208 }
209 printk("%s: dma_intr: bad DMA status\n", drive->name);
210 }
211 return ide_error(drive, "dma_intr", stat);
212 }
213
214 static int ide_build_sglist (ide_hwif_t *hwif, struct request *rq)
215 {
216 struct buffer_head *bh;
217 struct scatterlist *sg = hwif->sg_table;
218 int nents = 0;
219
220 if (rq->cmd == READ)
221 hwif->sg_dma_direction = PCI_DMA_FROMDEVICE;
222 else
223 hwif->sg_dma_direction = PCI_DMA_TODEVICE;
224 bh = rq->bh;
225 do {
226 unsigned char *virt_addr = bh->b_data;
227 unsigned int size = bh->b_size;
228
229 while ((bh = bh->b_reqnext) != NULL) {
230 if ((virt_addr + size) != (unsigned char *) bh->b_data)
231 break;
232 size += bh->b_size;
233 }
234 memset(&sg[nents], 0, sizeof(*sg));
235 sg[nents].address = virt_addr;
236 sg[nents].length = size;
237 nents++;
238 } while (bh != NULL);
239
240 return pci_map_sg(hwif->pci_dev, sg, nents, hwif->sg_dma_direction);
241 }
242
243 /*
244 * ide_build_dmatable() prepares a dma request.
245 * Returns 0 if all went okay, returns 1 otherwise.
246 * May also be invoked from trm290.c
247 */
248 int ide_build_dmatable (ide_drive_t *drive, ide_dma_action_t func)
249 {
250 unsigned int *table = HWIF(drive)->dmatable_cpu;
251 #ifdef CONFIG_BLK_DEV_TRM290
252 unsigned int is_trm290_chipset = (HWIF(drive)->chipset == ide_trm290);
253 #else
254 const int is_trm290_chipset = 0;
255 #endif
256 unsigned int count = 0;
257 int i;
258 struct scatterlist *sg;
259
260 HWIF(drive)->sg_nents = i = ide_build_sglist(HWIF(drive), HWGROUP(drive)->rq);
261
262 sg = HWIF(drive)->sg_table;
263 while (i && sg_dma_len(sg)) {
264 u32 cur_addr;
265 u32 cur_len;
266
267 cur_addr = sg_dma_address(sg);
268 cur_len = sg_dma_len(sg);
269
270 /*
271 * Fill in the dma table, without crossing any 64kB boundaries.
272 * Most hardware requires 16-bit alignment of all blocks,
273 * but the trm290 requires 32-bit alignment.
274 */
275
276 while (cur_len) {
277 if (++count >= PRD_ENTRIES) {
278 printk("%s: DMA table too small\n", drive->name);
279 pci_unmap_sg(HWIF(drive)->pci_dev,
280 HWIF(drive)->sg_table,
281 HWIF(drive)->sg_nents,
282 HWIF(drive)->sg_dma_direction);
283 return 0; /* revert to PIO for this request */
284 } else {
285 u32 xcount, bcount = 0x10000 - (cur_addr & 0xffff);
286
287 if (bcount > cur_len)
288 bcount = cur_len;
289 *table++ = cpu_to_le32(cur_addr);
290 xcount = bcount & 0xffff;
291 if (is_trm290_chipset)
292 xcount = ((xcount >> 2) - 1) << 16;
293 *table++ = cpu_to_le32(xcount);
294 cur_addr += bcount;
295 cur_len -= bcount;
296 }
297 }
298
299 sg++;
300 i--;
301 }
302
303 if (!count)
304 printk("%s: empty DMA table?\n", drive->name);
305 else if (!is_trm290_chipset)
306 *--table |= cpu_to_le32(0x80000000);
307
308 return count;
309 }
310
311 /* Teardown mappings after DMA has completed. */
312 void ide_destroy_dmatable (ide_drive_t *drive)
313 {
314 struct pci_dev *dev = HWIF(drive)->pci_dev;
315 struct scatterlist *sg = HWIF(drive)->sg_table;
316 int nents = HWIF(drive)->sg_nents;
317
318 pci_unmap_sg(dev, sg, nents, HWIF(drive)->sg_dma_direction);
319 }
320
321 /*
322 * For both Blacklisted and Whitelisted drives.
323 * This is setup to be called as an extern for future support
324 * to other special driver code.
325 */
326 int check_drive_lists (ide_drive_t *drive, int good_bad)
327 {
328 struct hd_driveid *id = drive->id;
329
330 #ifdef CONFIG_IDEDMA_NEW_DRIVE_LISTINGS
331 if (good_bad) {
332 return in_drive_list(id, drive_whitelist);
333 } else {
334 int blacklist = in_drive_list(id, drive_blacklist);
335 if (blacklist)
336 printk("%s: Disabling (U)DMA for %s\n", drive->name, id->model);
337 return(blacklist);
338 }
339 #else /* !CONFIG_IDEDMA_NEW_DRIVE_LISTINGS */
340 const char **list;
341
342 if (good_bad) {
343 /* Consult the list of known "good" drives */
344 list = good_dma_drives;
345 while (*list) {
346 if (!strcmp(*list++,id->model))
347 return 1;
348 }
349 } else {
350 /* Consult the list of known "bad" drives */
351 list = bad_dma_drives;
352 while (*list) {
353 if (!strcmp(*list++,id->model)) {
354 printk("%s: Disabling (U)DMA for %s\n",
355 drive->name, id->model);
356 return 1;
357 }
358 }
359 }
360 #endif /* CONFIG_IDEDMA_NEW_DRIVE_LISTINGS */
361 return 0;
362 }
363
364 int report_drive_dmaing (ide_drive_t *drive)
365 {
366 struct hd_driveid *id = drive->id;
367
368 if ((id->field_valid & 4) && (eighty_ninty_three(drive)) &&
369 (id->dma_ultra & (id->dma_ultra >> 11) & 7)) {
370 if ((id->dma_ultra >> 13) & 1) {
371 printk(", UDMA(100)"); /* UDMA BIOS-enabled! */
372 } else if ((id->dma_ultra >> 12) & 1) {
373 printk(", UDMA(66)"); /* UDMA BIOS-enabled! */
374 } else {
375 printk(", UDMA(44)"); /* UDMA BIOS-enabled! */
376 }
377 } else if ((id->field_valid & 4) &&
378 (id->dma_ultra & (id->dma_ultra >> 8) & 7)) {
379 if ((id->dma_ultra >> 10) & 1) {
380 printk(", UDMA(33)"); /* UDMA BIOS-enabled! */
381 } else if ((id->dma_ultra >> 9) & 1) {
382 printk(", UDMA(25)"); /* UDMA BIOS-enabled! */
383 } else {
384 printk(", UDMA(16)"); /* UDMA BIOS-enabled! */
385 }
386 } else if (id->field_valid & 4) {
387 printk(", (U)DMA"); /* Can be BIOS-enabled! */
388 } else {
389 printk(", DMA");
390 }
391 return 1;
392 }
393
394 static int config_drive_for_dma (ide_drive_t *drive)
395 {
396 struct hd_driveid *id = drive->id;
397 ide_hwif_t *hwif = HWIF(drive);
398
399 if (id && (id->capability & 1) && hwif->autodma) {
400 /* Consult the list of known "bad" drives */
401 if (ide_dmaproc(ide_dma_bad_drive, drive))
402 return hwif->dmaproc(ide_dma_off, drive);
403
404 /* Enable DMA on any drive that has UltraDMA (mode 3/4/5) enabled */
405 if ((id->field_valid & 4) && (eighty_ninty_three(drive)))
406 if ((id->dma_ultra & (id->dma_ultra >> 11) & 7))
407 return hwif->dmaproc(ide_dma_on, drive);
408 /* Enable DMA on any drive that has UltraDMA (mode 0/1/2) enabled */
409 if (id->field_valid & 4) /* UltraDMA */
410 if ((id->dma_ultra & (id->dma_ultra >> 8) & 7))
411 return hwif->dmaproc(ide_dma_on, drive);
412 /* Enable DMA on any drive that has mode2 DMA (multi or single) enabled */
413 if (id->field_valid & 2) /* regular DMA */
414 if ((id->dma_mword & 0x404) == 0x404 || (id->dma_1word & 0x404) == 0x404)
415 return hwif->dmaproc(ide_dma_on, drive);
416 /* Consult the list of known "good" drives */
417 if (ide_dmaproc(ide_dma_good_drive, drive))
418 return hwif->dmaproc(ide_dma_on, drive);
419 }
420 return hwif->dmaproc(ide_dma_off_quietly, drive);
421 }
422
423 /*
424 * 1 dmaing, 2 error, 4 intr
425 */
426 static int dma_timer_expiry (ide_drive_t *drive)
427 {
428 byte dma_stat = inb(HWIF(drive)->dma_base+2);
429
430 #ifdef DEBUG
431 printk("%s: dma_timer_expiry: dma status == 0x%02x\n", drive->name, dma_stat);
432 #endif /* DEBUG */
433
434 #if 1
435 HWGROUP(drive)->expiry = NULL; /* one free ride for now */
436 #endif
437
438 if (dma_stat & 2) { /* ERROR */
439 byte stat = GET_STAT();
440 return ide_error(drive, "dma_timer_expiry", stat);
441 }
442 if (dma_stat & 1) /* DMAing */
443 return WAIT_CMD;
444 return 0;
445 }
446
447 /*
448 * ide_dmaproc() initiates/aborts DMA read/write operations on a drive.
449 *
450 * The caller is assumed to have selected the drive and programmed the drive's
451 * sector address using CHS or LBA. All that remains is to prepare for DMA
452 * and then issue the actual read/write DMA/PIO command to the drive.
453 *
454 * For ATAPI devices, we just prepare for DMA and return. The caller should
455 * then issue the packet command to the drive and call us again with
456 * ide_dma_begin afterwards.
457 *
458 * Returns 0 if all went well.
459 * Returns 1 if DMA read/write could not be started, in which case
460 * the caller should revert to PIO for the current request.
461 * May also be invoked from trm290.c
462 */
463 int ide_dmaproc (ide_dma_action_t func, ide_drive_t *drive)
464 {
465 ide_hwif_t *hwif = HWIF(drive);
466 unsigned long dma_base = hwif->dma_base;
467 byte unit = (drive->select.b.unit & 0x01);
468 unsigned int count, reading = 0;
469 byte dma_stat;
470
471 switch (func) {
472 case ide_dma_off:
473 printk("%s: DMA disabled\n", drive->name);
474 case ide_dma_off_quietly:
475 outb(inb(dma_base+2) & ~(1<<(5+unit)), dma_base+2);
476 case ide_dma_on:
477 drive->using_dma = (func == ide_dma_on);
478 if (drive->using_dma)
479 outb(inb(dma_base+2)|(1<<(5+unit)), dma_base+2);
480 return 0;
481 case ide_dma_check:
482 return config_drive_for_dma (drive);
483 case ide_dma_read:
484 reading = 1 << 3;
485 case ide_dma_write:
486 SELECT_READ_WRITE(hwif,drive,func);
487 if (!(count = ide_build_dmatable(drive, func)))
488 return 1; /* try PIO instead of DMA */
489 outl(hwif->dmatable_dma, dma_base + 4); /* PRD table */
490 outb(reading, dma_base); /* specify r/w */
491 outb(inb(dma_base+2)|6, dma_base+2); /* clear INTR & ERROR flags */
492 drive->waiting_for_dma = 1;
493 if (drive->media != ide_disk)
494 return 0;
495 ide_set_handler(drive, &ide_dma_intr, WAIT_CMD, dma_timer_expiry); /* issue cmd to drive */
496 OUT_BYTE(reading ? WIN_READDMA : WIN_WRITEDMA, IDE_COMMAND_REG);
497 case ide_dma_begin:
498 /* Note that this is done *after* the cmd has
499 * been issued to the drive, as per the BM-IDE spec.
500 * The Promise Ultra33 doesn't work correctly when
501 * we do this part before issuing the drive cmd.
502 */
503 outb(inb(dma_base)|1, dma_base); /* start DMA */
504 return 0;
505 case ide_dma_end: /* returns 1 on error, 0 otherwise */
506 drive->waiting_for_dma = 0;
507 outb(inb(dma_base)&~1, dma_base); /* stop DMA */
508 dma_stat = inb(dma_base+2); /* get DMA status */
509 outb(dma_stat|6, dma_base+2); /* clear the INTR & ERROR bits */
510 ide_destroy_dmatable(drive); /* purge DMA mappings */
511 return (dma_stat & 7) != 4; /* verify good DMA status */
512 case ide_dma_test_irq: /* returns 1 if dma irq issued, 0 otherwise */
513 dma_stat = inb(dma_base+2);
514 #if 0 /* do not set unless you know what you are doing */
515 if (dma_stat & 4) {
516 byte stat = GET_STAT();
517 outb(dma_base+2, dma_stat & 0xE4);
518 }
519 #endif
520 return (dma_stat & 4) == 4; /* return 1 if INTR asserted */
521 case ide_dma_bad_drive:
522 case ide_dma_good_drive:
523 return check_drive_lists(drive, (func == ide_dma_good_drive));
524 case ide_dma_verbose:
525 return report_drive_dmaing(drive);
526 case ide_dma_timeout:
527 #ifdef CONFIG_BLK_DEV_IDEDMA_TIMEOUT
528 /*
529 * Have to issue an abort and requeue the request
530 * DMA engine got turned off by a goofy ASIC, and
531 * we have to clean up the mess, and here is as good
532 * as any. Do it globally for all chipsets.
533 */
534 #endif /* CONFIG_BLK_DEV_IDEDMA_TIMEOUT */
535 case ide_dma_retune:
536 case ide_dma_lostirq:
537 printk("ide_dmaproc: chipset supported %s func only: %d\n", ide_dmafunc_verbose(func), func);
538 return 1;
539 default:
540 printk("ide_dmaproc: unsupported %s func: %d\n", ide_dmafunc_verbose(func), func);
541 return 1;
542 }
543 }
544
545 /*
546 * Needed for allowing full modular support of ide-driver
547 */
548 int ide_release_dma (ide_hwif_t *hwif)
549 {
550 if (hwif->dmatable_cpu) {
551 pci_free_consistent(hwif->pci_dev,
552 PRD_ENTRIES * PRD_BYTES,
553 hwif->dmatable_cpu,
554 hwif->dmatable_dma);
555 hwif->dmatable_cpu = NULL;
556 }
557 if (hwif->sg_table) {
558 kfree(hwif->sg_table);
559 hwif->sg_table = NULL;
560 }
561 if ((hwif->dma_extra) && (hwif->channel == 0))
562 release_region((hwif->dma_base + 16), hwif->dma_extra);
563 release_region(hwif->dma_base, 8);
564 return 1;
565 }
566
567 /*
568 * This can be called for a dynamically installed interface. Don't __init it
569 */
570
571 void ide_setup_dma (ide_hwif_t *hwif, unsigned long dma_base, unsigned int num_ports)
572 {
573 printk(" %s: BM-DMA at 0x%04lx-0x%04lx", hwif->name, dma_base, dma_base + num_ports - 1);
574 if (check_region(dma_base, num_ports)) {
575 printk(" -- ERROR, PORT ADDRESSES ALREADY IN USE\n");
576 return;
577 }
578 request_region(dma_base, num_ports, hwif->name);
579 hwif->dma_base = dma_base;
580 hwif->dmatable_cpu = pci_alloc_consistent(hwif->pci_dev,
581 PRD_ENTRIES * PRD_BYTES,
582 &hwif->dmatable_dma);
583 if (hwif->dmatable_cpu == NULL)
584 goto dma_alloc_failure;
585
586 hwif->sg_table = kmalloc(sizeof(struct scatterlist) * PRD_ENTRIES,
587 GFP_KERNEL);
588 if (hwif->sg_table == NULL) {
589 pci_free_consistent(hwif->pci_dev, PRD_ENTRIES * PRD_BYTES,
590 hwif->dmatable_cpu, hwif->dmatable_dma);
591 goto dma_alloc_failure;
592 }
593
594 hwif->dmaproc = &ide_dmaproc;
595
596 if (hwif->chipset != ide_trm290) {
597 byte dma_stat = inb(dma_base+2);
598 printk(", BIOS settings: %s:%s, %s:%s",
599 hwif->drives[0].name, (dma_stat & 0x20) ? "DMA" : "pio",
600 hwif->drives[1].name, (dma_stat & 0x40) ? "DMA" : "pio");
601 }
602 printk("\n");
603 return;
604
605 dma_alloc_failure:
606 printk(" -- ERROR, UNABLE TO ALLOCATE DMA TABLES\n");
607 }
608
609 /*
610 * Fetch the DMA Bus-Master-I/O-Base-Address (BMIBA) from PCI space:
611 */
612 unsigned long __init ide_get_or_set_dma_base (ide_hwif_t *hwif, int extra, const char *name)
613 {
614 unsigned long dma_base = 0;
615 struct pci_dev *dev = hwif->pci_dev;
616
617 if (hwif->mate && hwif->mate->dma_base) {
618 dma_base = hwif->mate->dma_base - (hwif->channel ? 0 : 8);
619 } else {
620 dma_base = pci_resource_start(dev, 4);
621 if (!dma_base) {
622 printk("%s: dma_base is invalid (0x%04lx)\n", name, dma_base);
623 dma_base = 0;
624 }
625 }
626 if (dma_base) {
627 if (extra) /* PDC20246, PDC20262, HPT343, & HPT366 */
628 request_region(dma_base+16, extra, name);
629 dma_base += hwif->channel ? 8 : 0;
630 hwif->dma_extra = extra;
631
632 switch(dev->device) {
633 case PCI_DEVICE_ID_AL_M5219:
634 case PCI_DEVICE_ID_AMD_VIPER_7409:
635 case PCI_DEVICE_ID_CMD_643:
636 outb(inb(dma_base+2) & 0x60, dma_base+2);
637 if (inb(dma_base+2) & 0x80) {
638 printk("%s: simplex device: DMA forced\n", name);
639 }
640 break;
641 default:
642 /*
643 * If the device claims "simplex" DMA,
644 * this means only one of the two interfaces
645 * can be trusted with DMA at any point in time.
646 * So we should enable DMA only on one of the
647 * two interfaces.
648 */
649 if ((inb(dma_base+2) & 0x80)) { /* simplex device? */
650 if ((!hwif->drives[0].present && !hwif->drives[1].present) ||
651 (hwif->mate && hwif->mate->dma_base)) {
652 printk("%s: simplex device: DMA disabled\n", name);
653 dma_base = 0;
654 }
655 }
656 }
657 }
658 return dma_base;
659 }
660
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