1 /*
2 * Lance ethernet driver for the MIPS processor based
3 * DECstation family
4 *
5 *
6 * adopted from sunlance.c by Richard van den Berg
7 *
8 * additional sources:
9 * - PMAD-AA TURBOchannel Ethernet Module Functional Specification,
10 * Revision 1.2
11 *
12 * History:
13 *
14 * v0.001: The kernel accepts the code and it shows the hardware address.
15 *
16 * v0.002: Removed most sparc stuff, left only some module and dma stuff.
17 *
18 * v0.003: Enhanced base address calculation from proposals by
19 * Harald Koerfgen and Thomas Riemer.
20 *
21 * v0.004: lance-regs is pointing at the right addresses, added prom
22 * check. First start of address mapping and DMA.
23 *
24 * v0.005: started to play around with LANCE-DMA. This driver will not work
25 * for non IOASIC lances. HK
26 *
27 * v0.006: added pointer arrays to lance_private and setup routine for them
28 * in dec_lance_init. HK
29 *
30 * v0.007: Big shit. The LANCE seems to use a different DMA mechanism to access
31 * the init block. This looks like one (short) word at a time, but the smallest
32 * amount the IOASIC can transfer is a (long) word. So we have a 2-2 padding here.
33 * Changed lance_init_block accordingly. The 16-16 padding for the buffers
34 * seems to be correct. HK
35 *
36 * v0.008 - mods to make PMAX_LANCE work. 01/09/1999 triemer
37 */
38
39 #undef DEBUG_DRIVER
40
41 static char *version =
42 "declance.c: v0.008 by Linux Mips DECstation task force\n";
43
44 static char *lancestr = "LANCE";
45
46 /*
47 * card types
48 */
49 #define ASIC_LANCE 1
50 #define PMAD_LANCE 2
51 #define PMAX_LANCE 3
52
53 #include <linux/init.h>
54 #include <linux/kernel.h>
55 #include <linux/netdevice.h>
56
57 #include <asm/dec/interrupts.h>
58 #include <asm/dec/ioasic_ints.h>
59 #include <asm/dec/ioasic_addrs.h>
60 #include <asm/dec/machtype.h>
61 #include <asm/dec/tc.h>
62 #include <asm/dec/kn01.h>
63 #include <asm/wbflush.h>
64 #include <asm/addrspace.h>
65
66 #include <linux/config.h>
67 #include <linux/errno.h>
68 #include <linux/hdreg.h>
69 #include <linux/ioport.h>
70 #include <linux/sched.h>
71 #include <linux/mm.h>
72 #include <linux/stddef.h>
73 #include <linux/string.h>
74 #include <linux/unistd.h>
75 #include <linux/ptrace.h>
76 #include <linux/malloc.h>
77 #include <linux/user.h>
78 #include <linux/utsname.h>
79 #include <linux/a.out.h>
80 #include <linux/tty.h>
81 #include <linux/delay.h>
82 #include <asm/io.h>
83 #include <linux/etherdevice.h>
84
85 #ifndef CONFIG_TC
86 unsigned long system_base = 0;
87 unsigned long dmaptr;
88 #endif
89 static int type;
90
91 #define CRC_POLYNOMIAL_BE 0x04c11db7UL /* Ethernet CRC, big endian */
92 #define CRC_POLYNOMIAL_LE 0xedb88320UL /* Ethernet CRC, little endian */
93
94 #define LE_CSR0 0
95 #define LE_CSR1 1
96 #define LE_CSR2 2
97 #define LE_CSR3 3
98
99 #define LE_MO_PROM 0x8000 /* Enable promiscuous mode */
100
101 #define LE_C0_ERR 0x8000 /* Error: set if BAB, SQE, MISS or ME is set */
102 #define LE_C0_BABL 0x4000 /* BAB: Babble: tx timeout. */
103 #define LE_C0_CERR 0x2000 /* SQE: Signal quality error */
104 #define LE_C0_MISS 0x1000 /* MISS: Missed a packet */
105 #define LE_C0_MERR 0x0800 /* ME: Memory error */
106 #define LE_C0_RINT 0x0400 /* Received interrupt */
107 #define LE_C0_TINT 0x0200 /* Transmitter Interrupt */
108 #define LE_C0_IDON 0x0100 /* IFIN: Init finished. */
109 #define LE_C0_INTR 0x0080 /* Interrupt or error */
110 #define LE_C0_INEA 0x0040 /* Interrupt enable */
111 #define LE_C0_RXON 0x0020 /* Receiver on */
112 #define LE_C0_TXON 0x0010 /* Transmitter on */
113 #define LE_C0_TDMD 0x0008 /* Transmitter demand */
114 #define LE_C0_STOP 0x0004 /* Stop the card */
115 #define LE_C0_STRT 0x0002 /* Start the card */
116 #define LE_C0_INIT 0x0001 /* Init the card */
117
118 #define LE_C3_BSWP 0x4 /* SWAP */
119 #define LE_C3_ACON 0x2 /* ALE Control */
120 #define LE_C3_BCON 0x1 /* Byte control */
121
122 /* Receive message descriptor 1 */
123 #define LE_R1_OWN 0x80 /* Who owns the entry */
124 #define LE_R1_ERR 0x40 /* Error: if FRA, OFL, CRC or BUF is set */
125 #define LE_R1_FRA 0x20 /* FRA: Frame error */
126 #define LE_R1_OFL 0x10 /* OFL: Frame overflow */
127 #define LE_R1_CRC 0x08 /* CRC error */
128 #define LE_R1_BUF 0x04 /* BUF: Buffer error */
129 #define LE_R1_SOP 0x02 /* Start of packet */
130 #define LE_R1_EOP 0x01 /* End of packet */
131 #define LE_R1_POK 0x03 /* Packet is complete: SOP + EOP */
132
133 #define LE_T1_OWN 0x80 /* Lance owns the packet */
134 #define LE_T1_ERR 0x40 /* Error summary */
135 #define LE_T1_EMORE 0x10 /* Error: more than one retry needed */
136 #define LE_T1_EONE 0x08 /* Error: one retry needed */
137 #define LE_T1_EDEF 0x04 /* Error: deferred */
138 #define LE_T1_SOP 0x02 /* Start of packet */
139 #define LE_T1_EOP 0x01 /* End of packet */
140 #define LE_T1_POK 0x03 /* Packet is complete: SOP + EOP */
141
142 #define LE_T3_BUF 0x8000 /* Buffer error */
143 #define LE_T3_UFL 0x4000 /* Error underflow */
144 #define LE_T3_LCOL 0x1000 /* Error late collision */
145 #define LE_T3_CLOS 0x0800 /* Error carrier loss */
146 #define LE_T3_RTY 0x0400 /* Error retry */
147 #define LE_T3_TDR 0x03ff /* Time Domain Reflectometry counter */
148
149 /* Define: 2^4 Tx buffers and 2^4 Rx buffers */
150
151 #ifndef LANCE_LOG_TX_BUFFERS
152 #define LANCE_LOG_TX_BUFFERS 4
153 #define LANCE_LOG_RX_BUFFERS 4
154 #endif
155
156 #define TX_RING_SIZE (1 << (LANCE_LOG_TX_BUFFERS))
157 #define TX_RING_MOD_MASK (TX_RING_SIZE - 1)
158
159 #define RX_RING_SIZE (1 << (LANCE_LOG_RX_BUFFERS))
160 #define RX_RING_MOD_MASK (RX_RING_SIZE - 1)
161
162 #define PKT_BUF_SZ 1536
163 #define RX_BUFF_SIZE PKT_BUF_SZ
164 #define TX_BUFF_SIZE PKT_BUF_SZ
165
166 #undef TEST_HITS
167 #define DEBUG_DRIVER 1
168
169 #define ZERO 0
170
171 /* The DS2000/3000 have a linear 64 KB buffer.
172
173 * The PMAD-AA has 128 kb buffer on-board.
174 *
175 * The IOASIC LANCE devices use a shared memory region. This region as seen
176 * from the CPU is (max) 128 KB long and has to be on an 128 KB boundary.
177 * The LANCE sees this as a 64 KB long continuous memory region.
178 *
179 * The LANCE's DMA address is used as an index in this buffer and DMA takes
180 * place in bursts of eight 16-Bit words which are packed into four 32-Bit words
181 * by the IOASIC. This leads to a strange padding: 16 bytes of valid data followed
182 * by a 16 byte gap :-(.
183 */
184
185 struct lance_rx_desc {
186 unsigned short rmd0; /* low address of packet */
187 short gap0;
188 unsigned char rmd1_hadr; /* high address of packet */
189 unsigned char rmd1_bits; /* descriptor bits */
190 short gap1;
191 short length; /* This length is 2s complement (negative)!
192 * Buffer length
193 */
194 short gap2;
195 unsigned short mblength; /* This is the actual number of bytes received */
196 short gap3;
197 };
198
199 struct lance_tx_desc {
200 unsigned short tmd0; /* low address of packet */
201 short gap0;
202 unsigned char tmd1_hadr; /* high address of packet */
203 unsigned char tmd1_bits; /* descriptor bits */
204 short gap1;
205 short length; /* Length is 2s complement (negative)! */
206 short gap2;
207 unsigned short misc;
208 short gap3;
209 };
210
211
212 /* First part of the LANCE initialization block, described in databook. */
213 struct lance_init_block {
214 unsigned short mode; /* Pre-set mode (reg. 15) */
215 short gap0;
216
217 unsigned char phys_addr[12]; /* Physical ethernet address
218 * only 0, 1, 4, 5, 8, 9 are valid
219 * 2, 3, 6, 7, 10, 11 are gaps
220 */
221 unsigned short filter[8]; /* Multicast filter.
222 * only 0, 2, 4, 6 are valid
223 * 1, 3, 5, 7 are gaps
224 */
225
226 /* Receive and transmit ring base, along with extra bits. */
227 unsigned short rx_ptr; /* receive descriptor addr */
228 short gap1;
229 unsigned short rx_len; /* receive len and high addr */
230 short gap2;
231 unsigned short tx_ptr; /* transmit descriptor addr */
232 short gap3;
233 unsigned short tx_len; /* transmit len and high addr */
234 short gap4;
235 char gap5[16];
236
237 /* The buffer descriptors */
238 struct lance_rx_desc brx_ring[RX_RING_SIZE];
239 struct lance_tx_desc btx_ring[TX_RING_SIZE];
240 };
241
242 #define BUF_OFFSET_CPU sizeof(struct lance_init_block)
243 #define BUF_OFFSET_LNC (sizeof(struct lance_init_block)>>1)
244
245 #define libdesc_offset(rt, elem) \
246 ((__u32)(((unsigned long)(&(((struct lance_init_block *)0)->rt[elem])))))
247
248 /*
249 * This works *only* for the ring descriptors
250 */
251 #define LANCE_ADDR(x) (PHYSADDR(x) >> 1)
252
253 struct lance_private {
254 char *name;
255 volatile struct lance_regs *ll;
256 volatile struct lance_init_block *init_block;
257 volatile unsigned long *dma_ptr_reg;
258
259 spinlock_t lock;
260
261 int rx_new, tx_new;
262 int rx_old, tx_old;
263
264 struct net_device_stats stats;
265
266 unsigned short busmaster_regval;
267
268 struct net_device *dev; /* Backpointer */
269 struct lance_private *next_module;
270 struct timer_list multicast_timer;
271
272 /* Pointers to the ring buffers as seen from the CPU */
273 char *rx_buf_ptr_cpu[RX_RING_SIZE];
274 char *tx_buf_ptr_cpu[TX_RING_SIZE];
275
276 /* Pointers to the ring buffers as seen from the LANCE */
277 char *rx_buf_ptr_lnc[RX_RING_SIZE];
278 char *tx_buf_ptr_lnc[TX_RING_SIZE];
279 };
280
281 #define TX_BUFFS_AVAIL ((lp->tx_old<=lp->tx_new)?\
282 lp->tx_old+TX_RING_MOD_MASK-lp->tx_new:\
283 lp->tx_old - lp->tx_new-1)
284
285 /* The lance control ports are at an absolute address, machine and tc-slot
286 * dependant.
287 * DECstations do only 32-bit access and the LANCE uses 16 bit addresses,
288 * so we have to give the structure an extra member making rap pointing
289 * at the right address
290 */
291 struct lance_regs {
292 volatile unsigned short rdp; /* register data port */
293 unsigned short pad;
294 volatile unsigned short rap; /* register address port */
295 };
296
297 int dec_lance_debug = 2;
298
299 /*
300 #ifdef MODULE
301 static struct lance_private *root_lance_dev = NULL;
302 #endif
303 */
304
305 static inline void writereg(volatile unsigned short *regptr, short value)
306 {
307 *regptr = value;
308 wbflush();
309 }
310
311 /* Load the CSR registers */
312 static void load_csrs(struct lance_private *lp)
313 {
314 volatile struct lance_regs *ll = lp->ll;
315 int leptr;
316
317 /* The address space as seen from the LANCE
318 * begins at address 0. HK
319 */
320 leptr = 0;
321
322 writereg(&ll->rap, LE_CSR1);
323 writereg(&ll->rdp, (leptr & 0xFFFF));
324 writereg(&ll->rap, LE_CSR2);
325 writereg(&ll->rdp, leptr >> 16);
326 writereg(&ll->rap, LE_CSR3);
327 writereg(&ll->rdp, lp->busmaster_regval);
328
329 /* Point back to csr0 */
330 writereg(&ll->rap, LE_CSR0);
331 }
332
333 /*
334 * Our specialized copy routines
335 *
336 */
337 void cp_to_buf(void *to, const void *from, __kernel_size_t len)
338 {
339 unsigned short *tp, *fp, clen;
340 unsigned char *rtp, *rfp;
341
342 if (type == PMAX_LANCE) {
343 clen = len >> 1;
344 tp = (unsigned short *) to;
345 fp = (unsigned short *) from;
346
347 while (clen--) {
348 *tp++ = *fp++;
349 tp++;
350 }
351
352 clen = len & 1;
353 rtp = (unsigned char *) tp;
354 rfp = (unsigned char *) fp;
355 while (clen--) {
356 *rtp++ = *rfp++;
357 }
358 } else {
359 /*
360 * copy 16 Byte chunks
361 */
362 clen = len >> 4;
363 tp = (unsigned short *) to;
364 fp = (unsigned short *) from;
365 while (clen--) {
366 *tp++ = *fp++;
367 *tp++ = *fp++;
368 *tp++ = *fp++;
369 *tp++ = *fp++;
370 *tp++ = *fp++;
371 *tp++ = *fp++;
372 *tp++ = *fp++;
373 *tp++ = *fp++;
374 tp += 8;
375 }
376
377 /*
378 * do the rest, if any.
379 */
380 clen = len & 15;
381 rtp = (unsigned char *) tp;
382 rfp = (unsigned char *) fp;
383 while (clen--) {
384 *rtp++ = *rfp++;
385 }
386 }
387
388 wbflush();
389 }
390
391 void cp_from_buf(void *to, unsigned char *from, int len)
392 {
393 unsigned short *tp, *fp, clen;
394 unsigned char *rtp, *rfp;
395
396 if (type == PMAX_LANCE) {
397 clen = len >> 1;
398 tp = (unsigned short *) to;
399 fp = (unsigned short *) from;
400 while (clen--) {
401 *tp++ = *fp++;
402 fp++;
403 }
404
405 clen = len & 1;
406
407 rtp = (unsigned char *) tp;
408 rfp = (unsigned char *) fp;
409
410 while (clen--) {
411 *rtp++ = *rfp++;
412 }
413 } else {
414
415 /*
416 * copy 16 Byte chunks
417 */
418 clen = len >> 4;
419 tp = (unsigned short *) to;
420 fp = (unsigned short *) from;
421 while (clen--) {
422 *tp++ = *fp++;
423 *tp++ = *fp++;
424 *tp++ = *fp++;
425 *tp++ = *fp++;
426 *tp++ = *fp++;
427 *tp++ = *fp++;
428 *tp++ = *fp++;
429 *tp++ = *fp++;
430 fp += 8;
431 }
432
433 /*
434 * do the rest, if any.
435 */
436 clen = len & 15;
437 rtp = (unsigned char *) tp;
438 rfp = (unsigned char *) fp;
439 while (clen--) {
440 *rtp++ = *rfp++;
441 }
442
443
444 }
445
446 }
447
448 /* Setup the Lance Rx and Tx rings */
449 static void lance_init_ring(struct net_device *dev)
450 {
451 struct lance_private *lp = (struct lance_private *) dev->priv;
452 volatile struct lance_init_block *ib;
453 int leptr;
454 int i;
455
456 ib = (struct lance_init_block *) (dev->mem_start);
457
458 /* Lock out other processes while setting up hardware */
459 netif_stop_queue(dev);
460 lp->rx_new = lp->tx_new = 0;
461 lp->rx_old = lp->tx_old = 0;
462
463 /* Copy the ethernet address to the lance init block.
464 * XXX bit 0 of the physical address registers has to be zero
465 */
466 ib->phys_addr[0] = dev->dev_addr[0];
467 ib->phys_addr[1] = dev->dev_addr[1];
468 ib->phys_addr[4] = dev->dev_addr[2];
469 ib->phys_addr[5] = dev->dev_addr[3];
470 ib->phys_addr[8] = dev->dev_addr[4];
471 ib->phys_addr[9] = dev->dev_addr[5];
472 /* Setup the initialization block */
473
474 /* Setup rx descriptor pointer */
475 leptr = LANCE_ADDR(libdesc_offset(brx_ring, 0));
476 ib->rx_len = (LANCE_LOG_RX_BUFFERS << 13) | (leptr >> 16);
477 ib->rx_ptr = leptr;
478 if (ZERO)
479 printk("RX ptr: %8.8x(%8.8x)\n", leptr, libdesc_offset(brx_ring, 0));
480
481 /* Setup tx descriptor pointer */
482 leptr = LANCE_ADDR(libdesc_offset(btx_ring, 0));
483 ib->tx_len = (LANCE_LOG_TX_BUFFERS << 13) | (leptr >> 16);
484 ib->tx_ptr = leptr;
485 if (ZERO)
486 printk("TX ptr: %8.8x(%8.8x)\n", leptr, libdesc_offset(btx_ring, 0));
487
488 if (ZERO)
489 printk("TX rings:\n");
490
491 /* Setup the Tx ring entries */
492 for (i = 0; i < TX_RING_SIZE; i++) {
493 leptr = (int) lp->tx_buf_ptr_lnc[i];
494 ib->btx_ring[i].tmd0 = leptr;
495 ib->btx_ring[i].tmd1_hadr = leptr >> 16;
496 ib->btx_ring[i].tmd1_bits = 0;
497 ib->btx_ring[i].length = 0xf000; /* The ones required by tmd2 */
498 ib->btx_ring[i].misc = 0;
499 if (i < 3 && ZERO)
500 printk("%d: 0x%8.8x(0x%8.8x)\n", i, leptr, (int) lp->tx_buf_ptr_cpu[i]);
501 }
502
503 /* Setup the Rx ring entries */
504 if (ZERO)
505 printk("RX rings:\n");
506 for (i = 0; i < RX_RING_SIZE; i++) {
507 leptr = (int) lp->rx_buf_ptr_lnc[i];
508 ib->brx_ring[i].rmd0 = leptr;
509 ib->brx_ring[i].rmd1_hadr = leptr >> 16;
510 ib->brx_ring[i].rmd1_bits = LE_R1_OWN;
511 ib->brx_ring[i].length = -RX_BUFF_SIZE | 0xf000;
512 ib->brx_ring[i].mblength = 0;
513 if (i < 3 && ZERO)
514 printk("%d: 0x%8.8x(0x%8.8x)\n", i, leptr, (int) lp->rx_buf_ptr_cpu[i]);
515 }
516 wbflush();
517 }
518
519 static int init_restart_lance(struct lance_private *lp)
520 {
521 volatile struct lance_regs *ll = lp->ll;
522 int i;
523
524 writereg(&ll->rap, LE_CSR0);
525 writereg(&ll->rdp, LE_C0_INIT);
526
527 /* Wait for the lance to complete initialization */
528 for (i = 0; (i < 100) && !(ll->rdp & LE_C0_IDON); i++) {
529 udelay(10);
530 }
531 if ((i == 100) || (ll->rdp & LE_C0_ERR)) {
532 printk("LANCE unopened after %d ticks, csr0=%4.4x.\n", i, ll->rdp);
533 return -1;
534 }
535 if ((ll->rdp & LE_C0_ERR)) {
536 printk("LANCE unopened after %d ticks, csr0=%4.4x.\n", i, ll->rdp);
537 return -1;
538 }
539 writereg(&ll->rdp, LE_C0_IDON);
540 writereg(&ll->rdp, LE_C0_STRT);
541 writereg(&ll->rdp, LE_C0_INEA);
542
543 return 0;
544 }
545
546 static int lance_rx(struct net_device *dev)
547 {
548 struct lance_private *lp = (struct lance_private *) dev->priv;
549 volatile struct lance_init_block *ib;
550 volatile struct lance_rx_desc *rd = 0;
551 unsigned char bits;
552 int len = 0;
553 struct sk_buff *skb = 0;
554 ib = (struct lance_init_block *) (dev->mem_start);
555
556 #ifdef TEST_HITS
557 int i;
558
559 printk("[");
560 for (i = 0; i < RX_RING_SIZE; i++) {
561 if (i == lp->rx_new)
562 printk("%s",
563 ib->brx_ring[i].rmd1_bits & LE_R1_OWN ? "_" : "X");
564 else
565 printk("%s",
566 ib->brx_ring[i].rmd1_bits & LE_R1_OWN ? "." : "1");
567 }
568 printk("]");
569 #endif
570
571 for (rd = &ib->brx_ring[lp->rx_new];
572 !((bits = rd->rmd1_bits) & LE_R1_OWN);
573 rd = &ib->brx_ring[lp->rx_new]) {
574
575 /* We got an incomplete frame? */
576 if ((bits & LE_R1_POK) != LE_R1_POK) {
577 lp->stats.rx_over_errors++;
578 lp->stats.rx_errors++;
579 } else if (bits & LE_R1_ERR) {
580 /* Count only the end frame as a rx error,
581 * not the beginning
582 */
583 if (bits & LE_R1_BUF)
584 lp->stats.rx_fifo_errors++;
585 if (bits & LE_R1_CRC)
586 lp->stats.rx_crc_errors++;
587 if (bits & LE_R1_OFL)
588 lp->stats.rx_over_errors++;
589 if (bits & LE_R1_FRA)
590 lp->stats.rx_frame_errors++;
591 if (bits & LE_R1_EOP)
592 lp->stats.rx_errors++;
593 } else {
594 len = (rd->mblength & 0xfff) - 4;
595 skb = dev_alloc_skb(len + 2);
596
597 if (skb == 0) {
598 printk("%s: Memory squeeze, deferring packet.\n",
599 dev->name);
600 lp->stats.rx_dropped++;
601 rd->mblength = 0;
602 rd->rmd1_bits = LE_R1_OWN;
603 lp->rx_new = (lp->rx_new + 1) & RX_RING_MOD_MASK;
604 return 0;
605 }
606 lp->stats.rx_bytes += len;
607
608 skb->dev = dev;
609 skb_reserve(skb, 2); /* 16 byte align */
610 skb_put(skb, len); /* make room */
611 cp_from_buf(skb->data,
612 (char *) lp->rx_buf_ptr_cpu[lp->rx_new],
613 len);
614 skb->protocol = eth_type_trans(skb, dev);
615 netif_rx(skb);
616 lp->stats.rx_packets++;
617 }
618
619 /* Return the packet to the pool */
620 rd->mblength = 0;
621 rd->length = -RX_BUFF_SIZE | 0xf000;
622 rd->rmd1_bits = LE_R1_OWN;
623 lp->rx_new = (lp->rx_new + 1) & RX_RING_MOD_MASK;
624 }
625 return 0;
626 }
627
628 static void lance_tx(struct net_device *dev)
629 {
630 struct lance_private *lp = (struct lance_private *) dev->priv;
631 volatile struct lance_init_block *ib;
632 volatile struct lance_regs *ll = lp->ll;
633 volatile struct lance_tx_desc *td;
634 int i, j;
635 int status;
636 ib = (struct lance_init_block *) (dev->mem_start);
637 j = lp->tx_old;
638
639 spin_lock(&lp->lock);
640
641 for (i = j; i != lp->tx_new; i = j) {
642 td = &ib->btx_ring[i];
643 /* If we hit a packet not owned by us, stop */
644 if (td->tmd1_bits & LE_T1_OWN)
645 break;
646
647 if (td->tmd1_bits & LE_T1_ERR) {
648 status = td->misc;
649
650 lp->stats.tx_errors++;
651 if (status & LE_T3_RTY)
652 lp->stats.tx_aborted_errors++;
653 if (status & LE_T3_LCOL)
654 lp->stats.tx_window_errors++;
655
656 if (status & LE_T3_CLOS) {
657 lp->stats.tx_carrier_errors++;
658 printk("%s: Carrier Lost", dev->name);
659 /* Stop the lance */
660 writereg(&ll->rap, LE_CSR0);
661 writereg(&ll->rdp, LE_C0_STOP);
662 lance_init_ring(dev);
663 load_csrs(lp);
664 init_restart_lance(lp);
665 goto out;
666 }
667 /* Buffer errors and underflows turn off the
668 * transmitter, restart the adapter.
669 */
670 if (status & (LE_T3_BUF | LE_T3_UFL)) {
671 lp->stats.tx_fifo_errors++;
672
673 printk("%s: Tx: ERR_BUF|ERR_UFL, restarting\n",
674 dev->name);
675 /* Stop the lance */
676 writereg(&ll->rap, LE_CSR0);
677 writereg(&ll->rdp, LE_C0_STOP);
678 lance_init_ring(dev);
679 load_csrs(lp);
680 init_restart_lance(lp);
681 goto out;
682 }
683 } else if ((td->tmd1_bits & LE_T1_POK) == LE_T1_POK) {
684 /*
685 * So we don't count the packet more than once.
686 */
687 td->tmd1_bits &= ~(LE_T1_POK);
688
689 /* One collision before packet was sent. */
690 if (td->tmd1_bits & LE_T1_EONE)
691 lp->stats.collisions++;
692
693 /* More than one collision, be optimistic. */
694 if (td->tmd1_bits & LE_T1_EMORE)
695 lp->stats.collisions += 2;
696
697 lp->stats.tx_packets++;
698 }
699 j = (j + 1) & TX_RING_MOD_MASK;
700 }
701 lp->tx_old = j;
702 out:
703 if (netif_queue_stopped(dev) &&
704 TX_BUFFS_AVAIL > 0)
705 netif_wake_queue(dev);
706
707 spin_unlock(&lp->lock);
708 }
709
710 static void lance_interrupt(const int irq, void *dev_id, struct pt_regs *regs)
711 {
712 struct net_device *dev = (struct net_device *) dev_id;
713 struct lance_private *lp = (struct lance_private *) dev->priv;
714 volatile struct lance_regs *ll = lp->ll;
715 int csr0;
716
717 writereg(&ll->rap, LE_CSR0);
718 csr0 = ll->rdp;
719
720 /* Acknowledge all the interrupt sources ASAP */
721 writereg(&ll->rdp, csr0 & (LE_C0_INTR | LE_C0_TINT | LE_C0_RINT));
722
723 if ((csr0 & LE_C0_ERR)) {
724 /* Clear the error condition */
725 writereg(&ll->rdp, LE_C0_BABL | LE_C0_ERR | LE_C0_MISS |
726 LE_C0_CERR | LE_C0_MERR);
727 }
728 if (csr0 & LE_C0_RINT)
729 lance_rx(dev);
730
731 if (csr0 & LE_C0_TINT)
732 lance_tx(dev);
733
734 if (csr0 & LE_C0_BABL)
735 lp->stats.tx_errors++;
736
737 if (csr0 & LE_C0_MISS)
738 lp->stats.rx_errors++;
739
740 if (csr0 & LE_C0_MERR) {
741 volatile unsigned long int_stat = *(unsigned long *) (system_base + IOCTL + SIR);
742
743 printk("%s: Memory error, status %04x", dev->name, csr0);
744
745 if (int_stat & LANCE_DMA_MEMRDERR) {
746 printk("%s: DMA error\n", dev->name);
747 int_stat |= LANCE_DMA_MEMRDERR;
748 /*
749 * re-enable LANCE DMA
750 */
751 *(unsigned long *) (system_base + IOCTL + SSR) |= (1 << 16);
752 wbflush();
753 }
754 writereg(&ll->rdp, LE_C0_STOP);
755
756 lance_init_ring(dev);
757 load_csrs(lp);
758 init_restart_lance(lp);
759 netif_wake_queue(dev);
760 }
761 writereg(&ll->rdp, LE_C0_INEA);
762 writereg(&ll->rdp, LE_C0_INEA);
763 }
764
765 struct net_device *last_dev = 0;
766
767 static int lance_open(struct net_device *dev)
768 {
769 volatile struct lance_init_block *ib = (struct lance_init_block *) (dev->mem_start);
770 struct lance_private *lp = (struct lance_private *) dev->priv;
771 volatile struct lance_regs *ll = lp->ll;
772 int status = 0;
773
774 last_dev = dev;
775
776 /* Associate IRQ with lance_interrupt */
777 if (request_irq(dev->irq, &lance_interrupt, 0, lp->name, dev)) {
778 printk("Lance: Can't get irq %d\n", dev->irq);
779 return -EAGAIN;
780 }
781 /* Stop the Lance */
782 writereg(&ll->rap, LE_CSR0);
783 writereg(&ll->rdp, LE_C0_STOP);
784
785 /* Set mode and clear multicast filter only at device open,
786 * so that lance_init_ring() called at any error will not
787 * forget multicast filters.
788 *
789 * BTW it is common bug in all lance drivers! --ANK
790 */
791 ib->mode = 0;
792 ib->filter [0] = 0;
793 ib->filter [2] = 0;
794
795 lance_init_ring(dev);
796 load_csrs(lp);
797
798 netif_start_queue(dev);
799
800 status = init_restart_lance(lp);
801
802 /*
803 * if (!status)
804 * MOD_INC_USE_COUNT;
805 */
806
807 return status;
808 }
809
810 static int lance_close(struct net_device *dev)
811 {
812 struct lance_private *lp = (struct lance_private *) dev->priv;
813 volatile struct lance_regs *ll = lp->ll;
814
815 netif_stop_queue(dev);
816 del_timer_sync(&lp->multicast_timer);
817
818 /* Stop the card */
819 writereg(&ll->rap, LE_CSR0);
820 writereg(&ll->rdp, LE_C0_STOP);
821
822 free_irq(dev->irq, (void *) dev);
823 /*
824 MOD_DEC_USE_COUNT;
825 */
826 return 0;
827 }
828
829 static inline int lance_reset(struct net_device *dev)
830 {
831 struct lance_private *lp = (struct lance_private *) dev->priv;
832 volatile struct lance_regs *ll = lp->ll;
833 int status;
834
835 /* Stop the lance */
836 writereg(&ll->rap, LE_CSR0);
837 writereg(&ll->rdp, LE_C0_STOP);
838
839 lance_init_ring(dev);
840 load_csrs(lp);
841 dev->trans_start = jiffies;
842 status = init_restart_lance(lp);
843 return status;
844 }
845
846 static void lance_tx_timeout(struct net_device *dev)
847 {
848 struct lance_private *lp = (struct lance_private *) dev->priv;
849 volatile struct lance_regs *ll = lp->ll;
850
851 printk(KERN_ERR "%s: transmit timed out, status %04x, reset\n",
852 dev->name, ll->rdp);
853 lance_reset(dev);
854 netif_wake_queue(dev);
855 }
856
857 static int lance_start_xmit(struct sk_buff *skb, struct net_device *dev)
858 {
859 struct lance_private *lp = (struct lance_private *) dev->priv;
860 volatile struct lance_regs *ll = lp->ll;
861 volatile struct lance_init_block *ib = (struct lance_init_block *) (dev->mem_start);
862 int entry, skblen, len;
863
864 skblen = skb->len;
865
866 len = (skblen <= ETH_ZLEN) ? ETH_ZLEN : skblen;
867
868 lp->stats.tx_bytes += len;
869
870 entry = lp->tx_new & TX_RING_MOD_MASK;
871 ib->btx_ring[entry].length = (-len);
872 ib->btx_ring[entry].misc = 0;
873
874 cp_to_buf((char *) lp->tx_buf_ptr_cpu[entry], skb->data, skblen);
875
876 /* Clear the slack of the packet, do I need this? */
877 /* For a firewall its a good idea - AC */
878 /*
879 if (len != skblen)
880 memset ((char *) &ib->tx_buf [entry][skblen], 0, (len - skblen) << 1);
881 */
882
883 /* Now, give the packet to the lance */
884 ib->btx_ring[entry].tmd1_bits = (LE_T1_POK | LE_T1_OWN);
885 lp->tx_new = (lp->tx_new + 1) & TX_RING_MOD_MASK;
886
887 if (TX_BUFFS_AVAIL <= 0)
888 netif_stop_queue(dev);
889
890 /* Kick the lance: transmit now */
891 writereg(&ll->rdp, LE_C0_INEA | LE_C0_TDMD);
892
893 spin_unlock_irq(&lp->lock);
894
895 dev->trans_start = jiffies;
896 dev_kfree_skb(skb);
897
898 return 0;
899 }
900
901 static struct net_device_stats *lance_get_stats(struct net_device *dev)
902 {
903 struct lance_private *lp = (struct lance_private *) dev->priv;
904
905 return &lp->stats;
906 }
907
908 static void lance_load_multicast(struct net_device *dev)
909 {
910 volatile struct lance_init_block *ib = (struct lance_init_block *) (dev->mem_start);
911 volatile u16 *mcast_table = (u16 *) & ib->filter;
912 struct dev_mc_list *dmi = dev->mc_list;
913 char *addrs;
914 int i, j, bit, byte;
915 u32 crc, poly = CRC_POLYNOMIAL_BE;
916
917 /* set all multicast bits */
918 if (dev->flags & IFF_ALLMULTI) {
919 ib->filter[0] = 0xffff;
920 ib->filter[2] = 0xffff;
921 ib->filter[4] = 0xffff;
922 ib->filter[6] = 0xffff;
923 return;
924 }
925 /* clear the multicast filter */
926 ib->filter[0] = 0;
927 ib->filter[2] = 0;
928 ib->filter[4] = 0;
929 ib->filter[6] = 0;
930
931 /* Add addresses */
932 for (i = 0; i < dev->mc_count; i++) {
933 addrs = dmi->dmi_addr;
934 dmi = dmi->next;
935
936 /* multicast address? */
937 if (!(*addrs & 1))
938 continue;
939
940 crc = 0xffffffff;
941 for (byte = 0; byte < 6; byte++)
942 for (bit = *addrs++, j = 0; j < 8; j++, bit >>= 1) {
943 int test;
944
945 test = ((bit ^ crc) & 0x01);
946 crc >>= 1;
947
948 if (test) {
949 crc = crc ^ poly;
950 }
951 }
952
953 crc = crc >> 26;
954 mcast_table[crc >> 3] |= 1 << (crc & 0xf);
955 }
956 return;
957 }
958
959 static void lance_set_multicast(struct net_device *dev)
960 {
961 struct lance_private *lp = (struct lance_private *) dev->priv;
962 volatile struct lance_init_block *ib;
963 volatile struct lance_regs *ll = lp->ll;
964
965 ib = (struct lance_init_block *) (dev->mem_start);
966
967 if (!netif_running(dev))
968 return;
969
970 if (lp->tx_old != lp->tx_new) {
971 mod_timer(&lp->multicast_timer, jiffies + 4);
972 netif_wake_queue(dev);
973 return;
974 }
975
976 netif_stop_queue(dev);
977
978 writereg(&ll->rap, LE_CSR0);
979 writereg(&ll->rdp, LE_C0_STOP);
980
981 lance_init_ring(dev);
982
983 if (dev->flags & IFF_PROMISC) {
984 ib->mode |= LE_MO_PROM;
985 } else {
986 ib->mode &= ~LE_MO_PROM;
987 lance_load_multicast(dev);
988 }
989 load_csrs(lp);
990 init_restart_lance(lp);
991 netif_wake_queue(dev);
992 }
993
994 static void lance_set_multicast_retry(unsigned long _opaque)
995 {
996 struct net_device *dev = (struct net_device *) _opaque;
997
998 lance_set_multicast(dev);
999 }
1000
1001 static int __init dec_lance_init(struct net_device *dev, const int type)
1002 {
1003 static unsigned version_printed;
1004 struct net_device *dev;
1005 struct lance_private *lp;
1006 volatile struct lance_regs *ll;
1007 int i, ret;
1008 unsigned long esar_base;
1009 unsigned char *esar;
1010
1011 #ifndef CONFIG_TC
1012 system_base = KN01_LANCE_BASE;
1013 #else
1014 int slot;
1015 #endif
1016
1017 if (dec_lance_debug && version_printed++ == 0)
1018 printk(version);
1019
1020 dev = init_etherdev(0, sizeof(struct lance_private));
1021 if (!dev)
1022 return -ENOMEM;
1023
1024 /* init_etherdev ensures the data structures used by the LANCE are aligned. */
1025 lp = (struct lance_private *) dev->priv;
1026 spin_lock_init(&lp->lock);
1027
1028 switch (type) {
1029 #ifdef CONFIG_TC
1030 case ASIC_LANCE:
1031 dev->base_addr = system_base + LANCE;
1032
1033 /* buffer space for the on-board LANCE shared memory */
1034 /*
1035 * FIXME: ugly hack!
1036 */
1037 dev->mem_start = KSEG1ADDR(0x0020000);
1038 dev->mem_end = dev->mem_start + 0x00020000;
1039 dev->irq = ETHER;
1040 esar_base = system_base + ESAR;
1041
1042 /*
1043 * setup the pointer arrays, this sucks [tm] :-(
1044 */
1045 for (i = 0; i < RX_RING_SIZE; i++) {
1046 lp->rx_buf_ptr_cpu[i] = (char *) (dev->mem_start + BUF_OFFSET_CPU
1047 + 2 * i * RX_BUFF_SIZE);
1048 lp->rx_buf_ptr_lnc[i] = (char *) (BUF_OFFSET_LNC
1049 + i * RX_BUFF_SIZE);
1050 }
1051 for (i = 0; i < TX_RING_SIZE; i++) {
1052 lp->tx_buf_ptr_cpu[i] = (char *) (dev->mem_start + BUF_OFFSET_CPU
1053 + 2 * RX_RING_SIZE * RX_BUFF_SIZE
1054 + 2 * i * TX_BUFF_SIZE);
1055 lp->tx_buf_ptr_lnc[i] = (char *) (BUF_OFFSET_LNC
1056 + RX_RING_SIZE * RX_BUFF_SIZE
1057 + i * TX_BUFF_SIZE);
1058 }
1059
1060 /*
1061 * setup and enable IOASIC LANCE DMA
1062 */
1063 lp->dma_ptr_reg = (unsigned long *) (system_base + IOCTL + LANCE_DMA_P);
1064 *(lp->dma_ptr_reg) = PHYSADDR(dev->mem_start) << 3;
1065 *(unsigned long *) (system_base + IOCTL + SSR) |= (1 << 16);
1066 wbflush();
1067
1068 break;
1069 case PMAD_LANCE:
1070 slot = search_tc_card("PMAD-AA");
1071 claim_tc_card(slot);
1072
1073 dev->mem_start = get_tc_base_addr(slot);
1074 dev->base_addr = dev->mem_start + 0x100000;
1075 dev->irq = get_tc_irq_nr(slot);
1076 esar_base = dev->mem_start + 0x1c0002;
1077 break;
1078 #endif
1079 case PMAX_LANCE:
1080 dev->irq = ETHER;
1081 dev->base_addr = KN01_LANCE_BASE;
1082 dev->mem_start = KN01_LANCE_BASE + 0x01000000;
1083 esar_base = KN01_RTC_BASE + 1;
1084 /*
1085 * setup the pointer arrays, this sucks [tm] :-(
1086 */
1087 for (i = 0; i < RX_RING_SIZE; i++) {
1088 lp->rx_buf_ptr_cpu[i] =
1089 (char *) (dev->mem_start + BUF_OFFSET_CPU
1090 + 2 * i * RX_BUFF_SIZE);
1091
1092 lp->rx_buf_ptr_lnc[i] =
1093 (char *) (BUF_OFFSET_LNC
1094 + i * RX_BUFF_SIZE);
1095
1096 }
1097 for (i = 0; i < TX_RING_SIZE; i++) {
1098 lp->tx_buf_ptr_cpu[i] =
1099 (char *) (dev->mem_start + BUF_OFFSET_CPU
1100 + 2 * RX_RING_SIZE * RX_BUFF_SIZE
1101 + 2 * i * TX_BUFF_SIZE);
1102 lp->tx_buf_ptr_lnc[i] = (char *) (BUF_OFFSET_LNC
1103 + RX_RING_SIZE * RX_BUFF_SIZE
1104 + i * TX_BUFF_SIZE);
1105
1106 }
1107 break;
1108 default:
1109 printk("declance_init called with unknown type\n");
1110 ret = -ENODEV;
1111 goto err_out;
1112 }
1113
1114 ll = (struct lance_regs *) dev->base_addr;
1115 esar = (unsigned char *) esar_base;
1116
1117 /* prom checks */
1118 /* First, check for test pattern */
1119 if (esar[0x60] != 0xff && esar[0x64] != 0x00 &&
1120 esar[0x68] != 0x55 && esar[0x6c] != 0xaa) {
1121 printk("Ethernet station address prom not found!\n");
1122 ret = -ENODEV;
1123 goto err_out;
1124 }
1125 /* Check the prom contents */
1126 for (i = 0; i < 8; i++) {
1127 if (esar[i * 4] != esar[0x3c - i * 4] &&
1128 esar[i * 4] != esar[0x40 + i * 4] &&
1129 esar[0x3c - i * 4] != esar[0x40 + i * 4]) {
1130 printk("Something is wrong with the ethernet "
1131 "station address prom!\n");
1132 ret = -ENODEV;
1133 goto err_out;
1134 }
1135 }
1136
1137 /* Copy the ethernet address to the device structure, later to the
1138 * lance initialization block so the lance gets it every time it's
1139 * (re)initialized.
1140 */
1141 switch (type) {
1142 case ASIC_LANCE:
1143 printk("%s: IOASIC onboard LANCE, addr = ", dev->name);
1144 break;
1145 case PMAD_LANCE:
1146 printk("%s: PMAD-AA, addr = ", dev->name);
1147 break;
1148 case PMAX_LANCE:
1149 printk("%s: PMAX onboard LANCE, addr = ", dev->name);
1150 break;
1151 }
1152 for (i = 0; i < 6; i++) {
1153 dev->dev_addr[i] = esar[i * 4];
1154 printk("%2.2x%c", dev->dev_addr[i], i == 5 ? ',' : ':');
1155 }
1156
1157 printk(" irq = %d\n", dev->irq);
1158
1159 lp->dev = dev;
1160 dev->open = &lance_open;
1161 dev->stop = &lance_close;
1162 dev->hard_start_xmit = &lance_start_xmit;
1163 dev->tx_timeout = &lance_tx_timeout;
1164 dev->watchdog_timeo = 5*HZ;
1165 dev->get_stats = &lance_get_stats;
1166 dev->set_multicast_list = &lance_set_multicast;
1167
1168 /* lp->ll is the location of the registers for lance card */
1169 lp->ll = ll;
1170
1171 lp->name = lancestr;
1172
1173 /* busmaster_regval (CSR3) should be zero according to the PMAD-AA
1174 * specification.
1175 */
1176 lp->busmaster_regval = 0;
1177
1178 dev->dma = 0;
1179
1180 ether_setup(dev);
1181
1182 /* We cannot sleep if the chip is busy during a
1183 * multicast list update event, because such events
1184 * can occur from interrupts (ex. IPv6). So we
1185 * use a timer to try again later when necessary. -DaveM
1186 */
1187 init_timer(&lp->multicast_timer);
1188 lp->multicast_timer.data = (unsigned long) dev;
1189 lp->multicast_timer.function = &lance_set_multicast_retry;
1190
1191 #ifdef MODULE
1192 dev->ifindex = dev_new_index();
1193 lp->next_module = root_lance_dev;
1194 root_lance_dev = lp;
1195 #endif
1196 return 0;
1197
1198 err_out:
1199 unregister_netdev(dev);
1200 kfree(dev);
1201 return ret;
1202 }
1203
1204
1205 /* Find all the lance cards on the system and initialize them */
1206 static int __init dec_lance_probe(void)
1207 {
1208 struct net_device *dev = NULL;
1209 static int called = 0;
1210
1211 #ifdef MODULE
1212 root_lance_dev = NULL;
1213 #endif
1214
1215 #ifdef CONFIG_TC
1216 int slot = -1;
1217
1218 if (TURBOCHANNEL) {
1219 if (IOASIC && !called) {
1220 called = 1;
1221 type = ASIC_LANCE;
1222 } else {
1223 if ((slot = search_tc_card("PMAD-AA")) >= 0) {
1224 type = PMAD_LANCE;
1225 } else {
1226 return -ENODEV;
1227 }
1228 }
1229 } else {
1230 if (!called) {
1231 called = 1;
1232 type = PMAX_LANCE;
1233 } else {
1234 return -ENODEV;
1235 }
1236 }
1237 #else
1238 if (!called && !TURBOCHANNEL) {
1239 called = 1;
1240 type = PMAX_LANCE;
1241 } else {
1242 return -ENODEV;
1243 }
1244 #endif
1245
1246 return dec_lance_init(dev, type);
1247 }
1248
1249 static void __exit dec_lance_cleanup(void)
1250 {
1251 #ifdef MODULE
1252 struct lance_private *lp;
1253
1254 while (root_lance_dev) {
1255 lp = root_lance_dev->next_module;
1256
1257 unregister_netdev(root_lance_dev->dev);
1258 kfree(root_lance_dev->dev);
1259 root_lance_dev = lp;
1260 }
1261 #endif /* MODULE */
1262 }
1263
1264 module_init(dec_lance_probe);
1265 module_exit(dec_lance_cleanup);
1266
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