1 /* lance.c: An AMD LANCE/PCnet ethernet driver for Linux. */
2 /*
3 Written/copyright 1993-1998 by Donald Becker.
4
5 Copyright 1993 United States Government as represented by the
6 Director, National Security Agency.
7 This software may be used and distributed according to the terms
8 of the GNU Public License, incorporated herein by reference.
9
10 This driver is for the Allied Telesis AT1500 and HP J2405A, and should work
11 with most other LANCE-based bus-master (NE2100/NE2500) ethercards.
12
13 The author may be reached as becker@CESDIS.gsfc.nasa.gov, or C/O
14 Center of Excellence in Space Data and Information Sciences
15 Code 930.5, Goddard Space Flight Center, Greenbelt MD 20771
16
17 Andrey V. Savochkin:
18 - alignment problem with 1.3.* kernel and some minor changes.
19 Thomas Bogendoerfer (tsbogend@bigbug.franken.de):
20 - added support for Linux/Alpha, but removed most of it, because
21 it worked only for the PCI chip.
22 - added hook for the 32bit lance driver
23 - added PCnetPCI II (79C970A) to chip table
24 Paul Gortmaker (gpg109@rsphy1.anu.edu.au):
25 - hopefully fix above so Linux/Alpha can use ISA cards too.
26 8/20/96 Fixed 7990 autoIRQ failure and reversed unneeded alignment -djb
27 v1.12 10/27/97 Module support -djb
28 v1.14 2/3/98 Module support modified, made PCI support optional -djb
29 v1.15 5/27/99 Fixed bug in the cleanup_module(). dev->priv was freed
30 before unregister_netdev() which caused NULL pointer
31 reference later in the chain (in rtnetlink_fill_ifinfo())
32 -- Mika Kuoppala <miku@iki.fi>
33
34 Forward ported v1.14 to 2.1.129, merged the PCI and misc changes from
35 the 2.1 version of the old driver - Alan Cox
36 */
37
38 static const char *version = "lance.c:v1.15ac 1999/11/13 dplatt@3do.com, becker@cesdis.gsfc.nasa.gov\n";
39
40 #include <linux/module.h>
41 #include <linux/kernel.h>
42 #include <linux/sched.h>
43 #include <linux/string.h>
44 #include <linux/ptrace.h>
45 #include <linux/errno.h>
46 #include <linux/ioport.h>
47 #include <linux/malloc.h>
48 #include <linux/interrupt.h>
49 #include <linux/pci.h>
50 #include <linux/init.h>
51 #include <asm/bitops.h>
52 #include <asm/io.h>
53 #include <asm/dma.h>
54
55 #include <linux/netdevice.h>
56 #include <linux/etherdevice.h>
57 #include <linux/skbuff.h>
58
59 static unsigned int lance_portlist[] __initdata = { 0x300, 0x320, 0x340, 0x360, 0};
60 int lance_probe(struct net_device *dev);
61 static int lance_probe1(struct net_device *dev, int ioaddr, int irq, int options);
62
63 #ifdef LANCE_DEBUG
64 int lance_debug = LANCE_DEBUG;
65 #else
66 int lance_debug = 1;
67 #endif
68
69 /*
70 Theory of Operation
71
72 I. Board Compatibility
73
74 This device driver is designed for the AMD 79C960, the "PCnet-ISA
75 single-chip ethernet controller for ISA". This chip is used in a wide
76 variety of boards from vendors such as Allied Telesis, HP, Kingston,
77 and Boca. This driver is also intended to work with older AMD 7990
78 designs, such as the NE1500 and NE2100, and newer 79C961. For convenience,
79 I use the name LANCE to refer to all of the AMD chips, even though it properly
80 refers only to the original 7990.
81
82 II. Board-specific settings
83
84 The driver is designed to work the boards that use the faster
85 bus-master mode, rather than in shared memory mode. (Only older designs
86 have on-board buffer memory needed to support the slower shared memory mode.)
87
88 Most ISA boards have jumpered settings for the I/O base, IRQ line, and DMA
89 channel. This driver probes the likely base addresses:
90 {0x300, 0x320, 0x340, 0x360}.
91 After the board is found it generates a DMA-timeout interrupt and uses
92 autoIRQ to find the IRQ line. The DMA channel can be set with the low bits
93 of the otherwise-unused dev->mem_start value (aka PARAM1). If unset it is
94 probed for by enabling each free DMA channel in turn and checking if
95 initialization succeeds.
96
97 The HP-J2405A board is an exception: with this board it is easy to read the
98 EEPROM-set values for the base, IRQ, and DMA. (Of course you must already
99 _know_ the base address -- that field is for writing the EEPROM.)
100
101 III. Driver operation
102
103 IIIa. Ring buffers
104 The LANCE uses ring buffers of Tx and Rx descriptors. Each entry describes
105 the base and length of the data buffer, along with status bits. The length
106 of these buffers is set by LANCE_LOG_{RX,TX}_BUFFERS, which is log_2() of
107 the buffer length (rather than being directly the buffer length) for
108 implementation ease. The current values are 2 (Tx) and 4 (Rx), which leads to
109 ring sizes of 4 (Tx) and 16 (Rx). Increasing the number of ring entries
110 needlessly uses extra space and reduces the chance that an upper layer will
111 be able to reorder queued Tx packets based on priority. Decreasing the number
112 of entries makes it more difficult to achieve back-to-back packet transmission
113 and increases the chance that Rx ring will overflow. (Consider the worst case
114 of receiving back-to-back minimum-sized packets.)
115
116 The LANCE has the capability to "chain" both Rx and Tx buffers, but this driver
117 statically allocates full-sized (slightly oversized -- PKT_BUF_SZ) buffers to
118 avoid the administrative overhead. For the Rx side this avoids dynamically
119 allocating full-sized buffers "just in case", at the expense of a
120 memory-to-memory data copy for each packet received. For most systems this
121 is a good tradeoff: the Rx buffer will always be in low memory, the copy
122 is inexpensive, and it primes the cache for later packet processing. For Tx
123 the buffers are only used when needed as low-memory bounce buffers.
124
125 IIIB. 16M memory limitations.
126 For the ISA bus master mode all structures used directly by the LANCE,
127 the initialization block, Rx and Tx rings, and data buffers, must be
128 accessible from the ISA bus, i.e. in the lower 16M of real memory.
129 This is a problem for current Linux kernels on >16M machines. The network
130 devices are initialized after memory initialization, and the kernel doles out
131 memory from the top of memory downward. The current solution is to have a
132 special network initialization routine that's called before memory
133 initialization; this will eventually be generalized for all network devices.
134 As mentioned before, low-memory "bounce-buffers" are used when needed.
135
136 IIIC. Synchronization
137 The driver runs as two independent, single-threaded flows of control. One
138 is the send-packet routine, which enforces single-threaded use by the
139 dev->tbusy flag. The other thread is the interrupt handler, which is single
140 threaded by the hardware and other software.
141
142 The send packet thread has partial control over the Tx ring and 'dev->tbusy'
143 flag. It sets the tbusy flag whenever it's queuing a Tx packet. If the next
144 queue slot is empty, it clears the tbusy flag when finished otherwise it sets
145 the 'lp->tx_full' flag.
146
147 The interrupt handler has exclusive control over the Rx ring and records stats
148 from the Tx ring. (The Tx-done interrupt can't be selectively turned off, so
149 we can't avoid the interrupt overhead by having the Tx routine reap the Tx
150 stats.) After reaping the stats, it marks the queue entry as empty by setting
151 the 'base' to zero. Iff the 'lp->tx_full' flag is set, it clears both the
152 tx_full and tbusy flags.
153
154 */
155
156 /* Set the number of Tx and Rx buffers, using Log_2(# buffers).
157 Reasonable default values are 16 Tx buffers, and 16 Rx buffers.
158 That translates to 4 and 4 (16 == 2^^4).
159 This is a compile-time option for efficiency.
160 */
161 #ifndef LANCE_LOG_TX_BUFFERS
162 #define LANCE_LOG_TX_BUFFERS 4
163 #define LANCE_LOG_RX_BUFFERS 4
164 #endif
165
166 #define TX_RING_SIZE (1 << (LANCE_LOG_TX_BUFFERS))
167 #define TX_RING_MOD_MASK (TX_RING_SIZE - 1)
168 #define TX_RING_LEN_BITS ((LANCE_LOG_TX_BUFFERS) << 29)
169
170 #define RX_RING_SIZE (1 << (LANCE_LOG_RX_BUFFERS))
171 #define RX_RING_MOD_MASK (RX_RING_SIZE - 1)
172 #define RX_RING_LEN_BITS ((LANCE_LOG_RX_BUFFERS) << 29)
173
174 #define PKT_BUF_SZ 1544
175
176 /* Offsets from base I/O address. */
177 #define LANCE_DATA 0x10
178 #define LANCE_ADDR 0x12
179 #define LANCE_RESET 0x14
180 #define LANCE_BUS_IF 0x16
181 #define LANCE_TOTAL_SIZE 0x18
182
183 #define TX_TIMEOUT 20
184
185 /* The LANCE Rx and Tx ring descriptors. */
186 struct lance_rx_head {
187 s32 base;
188 s16 buf_length; /* This length is 2s complement (negative)! */
189 s16 msg_length; /* This length is "normal". */
190 };
191
192 struct lance_tx_head {
193 s32 base;
194 s16 length; /* Length is 2s complement (negative)! */
195 s16 misc;
196 };
197
198 /* The LANCE initialization block, described in databook. */
199 struct lance_init_block {
200 u16 mode; /* Pre-set mode (reg. 15) */
201 u8 phys_addr[6]; /* Physical ethernet address */
202 u32 filter[2]; /* Multicast filter (unused). */
203 /* Receive and transmit ring base, along with extra bits. */
204 u32 rx_ring; /* Tx and Rx ring base pointers */
205 u32 tx_ring;
206 };
207
208 struct lance_private {
209 /* The Tx and Rx ring entries must be aligned on 8-byte boundaries. */
210 struct lance_rx_head rx_ring[RX_RING_SIZE];
211 struct lance_tx_head tx_ring[TX_RING_SIZE];
212 struct lance_init_block init_block;
213 const char *name;
214 /* The saved address of a sent-in-place packet/buffer, for skfree(). */
215 struct sk_buff* tx_skbuff[TX_RING_SIZE];
216 /* The addresses of receive-in-place skbuffs. */
217 struct sk_buff* rx_skbuff[RX_RING_SIZE];
218 unsigned long rx_buffs; /* Address of Rx and Tx buffers. */
219 /* Tx low-memory "bounce buffer" address. */
220 char (*tx_bounce_buffs)[PKT_BUF_SZ];
221 int cur_rx, cur_tx; /* The next free ring entry */
222 int dirty_rx, dirty_tx; /* The ring entries to be free()ed. */
223 int dma;
224 struct net_device_stats stats;
225 unsigned char chip_version; /* See lance_chip_type. */
226 spinlock_t devlock;
227 };
228
229 #define LANCE_MUST_PAD 0x00000001
230 #define LANCE_ENABLE_AUTOSELECT 0x00000002
231 #define LANCE_MUST_REINIT_RING 0x00000004
232 #define LANCE_MUST_UNRESET 0x00000008
233 #define LANCE_HAS_MISSED_FRAME 0x00000010
234
235 /* A mapping from the chip ID number to the part number and features.
236 These are from the datasheets -- in real life the '970 version
237 reportedly has the same ID as the '965. */
238 static struct lance_chip_type {
239 int id_number;
240 const char *name;
241 int flags;
242 } chip_table[] = {
243 {0x0000, "LANCE 7990", /* Ancient lance chip. */
244 LANCE_MUST_PAD + LANCE_MUST_UNRESET},
245 {0x0003, "PCnet/ISA 79C960", /* 79C960 PCnet/ISA. */
246 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
247 LANCE_HAS_MISSED_FRAME},
248 {0x2260, "PCnet/ISA+ 79C961", /* 79C961 PCnet/ISA+, Plug-n-Play. */
249 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
250 LANCE_HAS_MISSED_FRAME},
251 {0x2420, "PCnet/PCI 79C970", /* 79C970 or 79C974 PCnet-SCSI, PCI. */
252 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
253 LANCE_HAS_MISSED_FRAME},
254 /* Bug: the PCnet/PCI actually uses the PCnet/VLB ID number, so just call
255 it the PCnet32. */
256 {0x2430, "PCnet32", /* 79C965 PCnet for VL bus. */
257 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
258 LANCE_HAS_MISSED_FRAME},
259 {0x2621, "PCnet/PCI-II 79C970A", /* 79C970A PCInetPCI II. */
260 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
261 LANCE_HAS_MISSED_FRAME},
262 {0x0, "PCnet (unknown)",
263 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
264 LANCE_HAS_MISSED_FRAME},
265 };
266
267 enum {OLD_LANCE = 0, PCNET_ISA=1, PCNET_ISAP=2, PCNET_PCI=3, PCNET_VLB=4, PCNET_PCI_II=5, LANCE_UNKNOWN=6};
268
269
270 /* Non-zero if lance_probe1() needs to allocate low-memory bounce buffers.
271 Assume yes until we know the memory size. */
272 static unsigned char lance_need_isa_bounce_buffers = 1;
273
274 static int lance_open(struct net_device *dev);
275 static int lance_open_fail(struct net_device *dev);
276 static void lance_init_ring(struct net_device *dev, int mode);
277 static int lance_start_xmit(struct sk_buff *skb, struct net_device *dev);
278 static int lance_rx(struct net_device *dev);
279 static void lance_interrupt(int irq, void *dev_id, struct pt_regs *regs);
280 static int lance_close(struct net_device *dev);
281 static struct net_device_stats *lance_get_stats(struct net_device *dev);
282 static void set_multicast_list(struct net_device *dev);
283 static void lance_tx_timeout (struct net_device *dev);
284
285
286
287 #ifdef MODULE
288 #define MAX_CARDS 8 /* Max number of interfaces (cards) per module */
289
290 static struct net_device dev_lance[MAX_CARDS];
291 static int io[MAX_CARDS];
292 static int dma[MAX_CARDS];
293 static int irq[MAX_CARDS];
294
295 MODULE_PARM(io, "1-" __MODULE_STRING(MAX_CARDS) "i");
296 MODULE_PARM(dma, "1-" __MODULE_STRING(MAX_CARDS) "i");
297 MODULE_PARM(irq, "1-" __MODULE_STRING(MAX_CARDS) "i");
298
299 int init_module(void)
300 {
301 int this_dev, found = 0;
302
303 for (this_dev = 0; this_dev < MAX_CARDS; this_dev++) {
304 struct net_device *dev = &dev_lance[this_dev];
305 dev->irq = irq[this_dev];
306 dev->base_addr = io[this_dev];
307 dev->dma = dma[this_dev];
308 dev->init = lance_probe;
309 if (io[this_dev] == 0) {
310 if (this_dev != 0) break; /* only complain once */
311 printk(KERN_NOTICE "lance.c: Module autoprobing not allowed. Append \"io=0xNNN\" value(s).\n");
312 return -EPERM;
313 }
314 if (register_netdev(dev) != 0) {
315 printk(KERN_WARNING "lance.c: No PCnet/LANCE card found (i/o = 0x%x).\n", io[this_dev]);
316 if (found != 0) return 0; /* Got at least one. */
317 return -ENXIO;
318 }
319 found++;
320 }
321
322 return 0;
323 }
324
325 void cleanup_module(void)
326 {
327 int this_dev;
328
329 for (this_dev = 0; this_dev < MAX_CARDS; this_dev++) {
330 struct net_device *dev = &dev_lance[this_dev];
331 if (dev->priv != NULL) {
332 unregister_netdev(dev);
333 free_dma(dev->dma);
334 release_region(dev->base_addr, LANCE_TOTAL_SIZE);
335 kfree(dev->priv);
336 dev->priv = NULL;
337 }
338 }
339 }
340 #endif /* MODULE */
341
342 /* Starting in v2.1.*, the LANCE/PCnet probe is now similar to the other
343 board probes now that kmalloc() can allocate ISA DMA-able regions.
344 This also allows the LANCE driver to be used as a module.
345 */
346 int lance_probe(struct net_device *dev)
347 {
348 int *port, result;
349
350 if (high_memory <= phys_to_virt(16*1024*1024))
351 lance_need_isa_bounce_buffers = 0;
352
353 for (port = lance_portlist; *port; port++) {
354 int ioaddr = *port;
355
356 if ( check_region(ioaddr, LANCE_TOTAL_SIZE) == 0) {
357 /* Detect "normal" 0x57 0x57 and the NI6510EB 0x52 0x44
358 signatures w/ minimal I/O reads */
359 char offset15, offset14 = inb(ioaddr + 14);
360
361 if ((offset14 == 0x52 || offset14 == 0x57) &&
362 ((offset15 = inb(ioaddr + 15)) == 0x57 || offset15 == 0x44)) {
363 result = lance_probe1(dev, ioaddr, 0, 0);
364 if ( !result ) return 0;
365 }
366 }
367 }
368 return -ENODEV;
369 }
370
371 static int __init lance_probe1(struct net_device *dev, int ioaddr, int irq, int options)
372 {
373 struct lance_private *lp;
374 short dma_channels; /* Mark spuriously-busy DMA channels */
375 int i, reset_val, lance_version;
376 const char *chipname;
377 /* Flags for specific chips or boards. */
378 unsigned char hpJ2405A = 0; /* HP ISA adaptor */
379 int hp_builtin = 0; /* HP on-board ethernet. */
380 static int did_version = 0; /* Already printed version info. */
381 unsigned long flags;
382
383 /* First we look for special cases.
384 Check for HP's on-board ethernet by looking for 'HP' in the BIOS.
385 There are two HP versions, check the BIOS for the configuration port.
386 This method provided by L. Julliard, Laurent_Julliard@grenoble.hp.com.
387 */
388 if (isa_readw(0x000f0102) == 0x5048) {
389 static const short ioaddr_table[] = { 0x300, 0x320, 0x340, 0x360};
390 int hp_port = (isa_readl(0x000f00f1) & 1) ? 0x499 : 0x99;
391 /* We can have boards other than the built-in! Verify this is on-board. */
392 if ((inb(hp_port) & 0xc0) == 0x80
393 && ioaddr_table[inb(hp_port) & 3] == ioaddr)
394 hp_builtin = hp_port;
395 }
396 /* We also recognize the HP Vectra on-board here, but check below. */
397 hpJ2405A = (inb(ioaddr) == 0x08 && inb(ioaddr+1) == 0x00
398 && inb(ioaddr+2) == 0x09);
399
400 /* Reset the LANCE. */
401 reset_val = inw(ioaddr+LANCE_RESET); /* Reset the LANCE */
402
403 /* The Un-Reset needed is only needed for the real NE2100, and will
404 confuse the HP board. */
405 if (!hpJ2405A)
406 outw(reset_val, ioaddr+LANCE_RESET);
407
408 outw(0x0000, ioaddr+LANCE_ADDR); /* Switch to window 0 */
409 if (inw(ioaddr+LANCE_DATA) != 0x0004)
410 return -ENODEV;
411
412 /* Get the version of the chip. */
413 outw(88, ioaddr+LANCE_ADDR);
414 if (inw(ioaddr+LANCE_ADDR) != 88) {
415 lance_version = 0;
416 } else { /* Good, it's a newer chip. */
417 int chip_version = inw(ioaddr+LANCE_DATA);
418 outw(89, ioaddr+LANCE_ADDR);
419 chip_version |= inw(ioaddr+LANCE_DATA) << 16;
420 if (lance_debug > 2)
421 printk(" LANCE chip version is %#x.\n", chip_version);
422 if ((chip_version & 0xfff) != 0x003)
423 return -ENODEV;
424 chip_version = (chip_version >> 12) & 0xffff;
425 for (lance_version = 1; chip_table[lance_version].id_number; lance_version++) {
426 if (chip_table[lance_version].id_number == chip_version)
427 break;
428 }
429 }
430
431 /* We can't use init_etherdev() to allocate dev->priv because it must
432 a ISA DMA-able region. */
433 dev = init_etherdev(dev, 0);
434 if (!dev)
435 return -ENOMEM;
436 SET_MODULE_OWNER(dev);
437 dev->open = lance_open_fail;
438 chipname = chip_table[lance_version].name;
439 printk("%s: %s at %#3x,", dev->name, chipname, ioaddr);
440
441 /* There is a 16 byte station address PROM at the base address.
442 The first six bytes are the station address. */
443 for (i = 0; i < 6; i++)
444 printk(" %2.2x", dev->dev_addr[i] = inb(ioaddr + i));
445
446 dev->base_addr = ioaddr;
447 request_region(ioaddr, LANCE_TOTAL_SIZE, chip_table[lance_version].name);
448
449 /* Make certain the data structures used by the LANCE are aligned and DMAble. */
450
451 lp = (struct lance_private *)(((unsigned long)kmalloc(sizeof(*lp)+7,
452 GFP_DMA | GFP_KERNEL)+7) & ~7);
453 if(lp==NULL)
454 return -ENODEV;
455 if (lance_debug > 6) printk(" (#0x%05lx)", (unsigned long)lp);
456 memset(lp, 0, sizeof(*lp));
457 dev->priv = lp;
458 lp->name = chipname;
459 lp->rx_buffs = (unsigned long)kmalloc(PKT_BUF_SZ*RX_RING_SIZE,
460 GFP_DMA | GFP_KERNEL);
461 if (lance_need_isa_bounce_buffers)
462 lp->tx_bounce_buffs = kmalloc(PKT_BUF_SZ*TX_RING_SIZE,
463 GFP_DMA | GFP_KERNEL);
464 else
465 lp->tx_bounce_buffs = NULL;
466
467 lp->chip_version = lance_version;
468 lp->devlock = SPIN_LOCK_UNLOCKED;
469
470 lp->init_block.mode = 0x0003; /* Disable Rx and Tx. */
471 for (i = 0; i < 6; i++)
472 lp->init_block.phys_addr[i] = dev->dev_addr[i];
473 lp->init_block.filter[0] = 0x00000000;
474 lp->init_block.filter[1] = 0x00000000;
475 lp->init_block.rx_ring = ((u32)virt_to_bus(lp->rx_ring) & 0xffffff) | RX_RING_LEN_BITS;
476 lp->init_block.tx_ring = ((u32)virt_to_bus(lp->tx_ring) & 0xffffff) | TX_RING_LEN_BITS;
477
478 outw(0x0001, ioaddr+LANCE_ADDR);
479 inw(ioaddr+LANCE_ADDR);
480 outw((short) (u32) virt_to_bus(&lp->init_block), ioaddr+LANCE_DATA);
481 outw(0x0002, ioaddr+LANCE_ADDR);
482 inw(ioaddr+LANCE_ADDR);
483 outw(((u32)virt_to_bus(&lp->init_block)) >> 16, ioaddr+LANCE_DATA);
484 outw(0x0000, ioaddr+LANCE_ADDR);
485 inw(ioaddr+LANCE_ADDR);
486
487 if (irq) { /* Set iff PCI card. */
488 dev->dma = 4; /* Native bus-master, no DMA channel needed. */
489 dev->irq = irq;
490 } else if (hp_builtin) {
491 static const char dma_tbl[4] = {3, 5, 6, 0};
492 static const char irq_tbl[4] = {3, 4, 5, 9};
493 unsigned char port_val = inb(hp_builtin);
494 dev->dma = dma_tbl[(port_val >> 4) & 3];
495 dev->irq = irq_tbl[(port_val >> 2) & 3];
496 printk(" HP Vectra IRQ %d DMA %d.\n", dev->irq, dev->dma);
497 } else if (hpJ2405A) {
498 static const char dma_tbl[4] = {3, 5, 6, 7};
499 static const char irq_tbl[8] = {3, 4, 5, 9, 10, 11, 12, 15};
500 short reset_val = inw(ioaddr+LANCE_RESET);
501 dev->dma = dma_tbl[(reset_val >> 2) & 3];
502 dev->irq = irq_tbl[(reset_val >> 4) & 7];
503 printk(" HP J2405A IRQ %d DMA %d.\n", dev->irq, dev->dma);
504 } else if (lance_version == PCNET_ISAP) { /* The plug-n-play version. */
505 short bus_info;
506 outw(8, ioaddr+LANCE_ADDR);
507 bus_info = inw(ioaddr+LANCE_BUS_IF);
508 dev->dma = bus_info & 0x07;
509 dev->irq = (bus_info >> 4) & 0x0F;
510 } else {
511 /* The DMA channel may be passed in PARAM1. */
512 if (dev->mem_start & 0x07)
513 dev->dma = dev->mem_start & 0x07;
514 }
515
516 if (dev->dma == 0) {
517 /* Read the DMA channel status register, so that we can avoid
518 stuck DMA channels in the DMA detection below. */
519 dma_channels = ((inb(DMA1_STAT_REG) >> 4) & 0x0f) |
520 (inb(DMA2_STAT_REG) & 0xf0);
521 }
522 if (dev->irq >= 2)
523 printk(" assigned IRQ %d", dev->irq);
524 else if (lance_version != 0) { /* 7990 boards need DMA detection first. */
525 /* To auto-IRQ we enable the initialization-done and DMA error
526 interrupts. For ISA boards we get a DMA error, but VLB and PCI
527 boards will work. */
528 autoirq_setup(0);
529
530 /* Trigger an initialization just for the interrupt. */
531 outw(0x0041, ioaddr+LANCE_DATA);
532
533 dev->irq = autoirq_report(2);
534 if (dev->irq)
535 printk(", probed IRQ %d", dev->irq);
536 else {
537 printk(", failed to detect IRQ line.\n");
538 return -ENODEV;
539 }
540
541 /* Check for the initialization done bit, 0x0100, which means
542 that we don't need a DMA channel. */
543 if (inw(ioaddr+LANCE_DATA) & 0x0100)
544 dev->dma = 4;
545 }
546
547 if (dev->dma == 4) {
548 printk(", no DMA needed.\n");
549 } else if (dev->dma) {
550 if (request_dma(dev->dma, chipname)) {
551 printk("DMA %d allocation failed.\n", dev->dma);
552 return -ENODEV;
553 } else
554 printk(", assigned DMA %d.\n", dev->dma);
555 } else { /* OK, we have to auto-DMA. */
556 for (i = 0; i < 4; i++) {
557 static const char dmas[] = { 5, 6, 7, 3 };
558 int dma = dmas[i];
559 int boguscnt;
560
561 /* Don't enable a permanently busy DMA channel, or the machine
562 will hang. */
563 if (test_bit(dma, &dma_channels))
564 continue;
565 outw(0x7f04, ioaddr+LANCE_DATA); /* Clear the memory error bits. */
566 if (request_dma(dma, chipname))
567 continue;
568
569 flags=claim_dma_lock();
570 set_dma_mode(dma, DMA_MODE_CASCADE);
571 enable_dma(dma);
572 release_dma_lock(flags);
573
574 /* Trigger an initialization. */
575 outw(0x0001, ioaddr+LANCE_DATA);
576 for (boguscnt = 100; boguscnt > 0; --boguscnt)
577 if (inw(ioaddr+LANCE_DATA) & 0x0900)
578 break;
579 if (inw(ioaddr+LANCE_DATA) & 0x0100) {
580 dev->dma = dma;
581 printk(", DMA %d.\n", dev->dma);
582 break;
583 } else {
584 flags=claim_dma_lock();
585 disable_dma(dma);
586 release_dma_lock(flags);
587 free_dma(dma);
588 }
589 }
590 if (i == 4) { /* Failure: bail. */
591 printk("DMA detection failed.\n");
592 return -ENODEV;
593 }
594 }
595
596 if (lance_version == 0 && dev->irq == 0) {
597 /* We may auto-IRQ now that we have a DMA channel. */
598 /* Trigger an initialization just for the interrupt. */
599 autoirq_setup(0);
600 outw(0x0041, ioaddr+LANCE_DATA);
601
602 dev->irq = autoirq_report(4);
603 if (dev->irq == 0) {
604 printk(" Failed to detect the 7990 IRQ line.\n");
605 return -ENODEV;
606 }
607 printk(" Auto-IRQ detected IRQ%d.\n", dev->irq);
608 }
609
610 if (chip_table[lp->chip_version].flags & LANCE_ENABLE_AUTOSELECT) {
611 /* Turn on auto-select of media (10baseT or BNC) so that the user
612 can watch the LEDs even if the board isn't opened. */
613 outw(0x0002, ioaddr+LANCE_ADDR);
614 /* Don't touch 10base2 power bit. */
615 outw(inw(ioaddr+LANCE_BUS_IF) | 0x0002, ioaddr+LANCE_BUS_IF);
616 }
617
618 if (lance_debug > 0 && did_version++ == 0)
619 printk(version);
620
621 /* The LANCE-specific entries in the device structure. */
622 dev->open = lance_open;
623 dev->hard_start_xmit = lance_start_xmit;
624 dev->stop = lance_close;
625 dev->get_stats = lance_get_stats;
626 dev->set_multicast_list = set_multicast_list;
627 dev->tx_timeout = lance_tx_timeout;
628 dev->watchdog_timeo = TX_TIMEOUT;
629
630 return 0;
631 }
632
633 static int
634 lance_open_fail(struct net_device *dev)
635 {
636 return -ENODEV;
637 }
638
639
640
641 static int
642 lance_open(struct net_device *dev)
643 {
644 struct lance_private *lp = dev->priv;
645 int ioaddr = dev->base_addr;
646 int i;
647
648 if (dev->irq == 0 ||
649 request_irq(dev->irq, &lance_interrupt, 0, lp->name, dev)) {
650 return -EAGAIN;
651 }
652
653 /* We used to allocate DMA here, but that was silly.
654 DMA lines can't be shared! We now permanently allocate them. */
655
656 /* Reset the LANCE */
657 inw(ioaddr+LANCE_RESET);
658
659 /* The DMA controller is used as a no-operation slave, "cascade mode". */
660 if (dev->dma != 4) {
661 unsigned long flags=claim_dma_lock();
662 enable_dma(dev->dma);
663 set_dma_mode(dev->dma, DMA_MODE_CASCADE);
664 release_dma_lock(flags);
665 }
666
667 /* Un-Reset the LANCE, needed only for the NE2100. */
668 if (chip_table[lp->chip_version].flags & LANCE_MUST_UNRESET)
669 outw(0, ioaddr+LANCE_RESET);
670
671 if (chip_table[lp->chip_version].flags & LANCE_ENABLE_AUTOSELECT) {
672 /* This is 79C960-specific: Turn on auto-select of media (AUI, BNC). */
673 outw(0x0002, ioaddr+LANCE_ADDR);
674 /* Only touch autoselect bit. */
675 outw(inw(ioaddr+LANCE_BUS_IF) | 0x0002, ioaddr+LANCE_BUS_IF);
676 }
677
678 if (lance_debug > 1)
679 printk("%s: lance_open() irq %d dma %d tx/rx rings %#x/%#x init %#x.\n",
680 dev->name, dev->irq, dev->dma,
681 (u32) virt_to_bus(lp->tx_ring),
682 (u32) virt_to_bus(lp->rx_ring),
683 (u32) virt_to_bus(&lp->init_block));
684
685 lance_init_ring(dev, GFP_KERNEL);
686 /* Re-initialize the LANCE, and start it when done. */
687 outw(0x0001, ioaddr+LANCE_ADDR);
688 outw((short) (u32) virt_to_bus(&lp->init_block), ioaddr+LANCE_DATA);
689 outw(0x0002, ioaddr+LANCE_ADDR);
690 outw(((u32)virt_to_bus(&lp->init_block)) >> 16, ioaddr+LANCE_DATA);
691
692 outw(0x0004, ioaddr+LANCE_ADDR);
693 outw(0x0915, ioaddr+LANCE_DATA);
694
695 outw(0x0000, ioaddr+LANCE_ADDR);
696 outw(0x0001, ioaddr+LANCE_DATA);
697
698 netif_start_queue (dev);
699
700 i = 0;
701 while (i++ < 100)
702 if (inw(ioaddr+LANCE_DATA) & 0x0100)
703 break;
704 /*
705 * We used to clear the InitDone bit, 0x0100, here but Mark Stockton
706 * reports that doing so triggers a bug in the '974.
707 */
708 outw(0x0042, ioaddr+LANCE_DATA);
709
710 if (lance_debug > 2)
711 printk("%s: LANCE open after %d ticks, init block %#x csr0 %4.4x.\n",
712 dev->name, i, (u32) virt_to_bus(&lp->init_block), inw(ioaddr+LANCE_DATA));
713
714 return 0; /* Always succeed */
715 }
716
717 /* The LANCE has been halted for one reason or another (busmaster memory
718 arbitration error, Tx FIFO underflow, driver stopped it to reconfigure,
719 etc.). Modern LANCE variants always reload their ring-buffer
720 configuration when restarted, so we must reinitialize our ring
721 context before restarting. As part of this reinitialization,
722 find all packets still on the Tx ring and pretend that they had been
723 sent (in effect, drop the packets on the floor) - the higher-level
724 protocols will time out and retransmit. It'd be better to shuffle
725 these skbs to a temp list and then actually re-Tx them after
726 restarting the chip, but I'm too lazy to do so right now. dplatt@3do.com
727 */
728
729 static void
730 lance_purge_ring(struct net_device *dev)
731 {
732 struct lance_private *lp = dev->priv;
733 int i;
734
735 /* Free all the skbuffs in the Rx and Tx queues. */
736 for (i = 0; i < RX_RING_SIZE; i++) {
737 struct sk_buff *skb = lp->rx_skbuff[i];
738 lp->rx_skbuff[i] = 0;
739 lp->rx_ring[i].base = 0; /* Not owned by LANCE chip. */
740 if (skb)
741 dev_kfree_skb_any(skb);
742 }
743 for (i = 0; i < TX_RING_SIZE; i++) {
744 if (lp->tx_skbuff[i]) {
745 dev_kfree_skb_any(lp->tx_skbuff[i]);
746 lp->tx_skbuff[i] = NULL;
747 }
748 }
749 }
750
751
752 /* Initialize the LANCE Rx and Tx rings. */
753 static void
754 lance_init_ring(struct net_device *dev, int gfp)
755 {
756 struct lance_private *lp = dev->priv;
757 int i;
758
759 lp->cur_rx = lp->cur_tx = 0;
760 lp->dirty_rx = lp->dirty_tx = 0;
761
762 for (i = 0; i < RX_RING_SIZE; i++) {
763 struct sk_buff *skb;
764 void *rx_buff;
765
766 skb = alloc_skb(PKT_BUF_SZ, GFP_DMA | gfp);
767 lp->rx_skbuff[i] = skb;
768 if (skb) {
769 skb->dev = dev;
770 rx_buff = skb->tail;
771 } else
772 rx_buff = kmalloc(PKT_BUF_SZ, GFP_DMA | gfp);
773 if (rx_buff == NULL)
774 lp->rx_ring[i].base = 0;
775 else
776 lp->rx_ring[i].base = (u32)virt_to_bus(rx_buff) | 0x80000000;
777 lp->rx_ring[i].buf_length = -PKT_BUF_SZ;
778 }
779 /* The Tx buffer address is filled in as needed, but we do need to clear
780 the upper ownership bit. */
781 for (i = 0; i < TX_RING_SIZE; i++) {
782 lp->tx_skbuff[i] = 0;
783 lp->tx_ring[i].base = 0;
784 }
785
786 lp->init_block.mode = 0x0000;
787 for (i = 0; i < 6; i++)
788 lp->init_block.phys_addr[i] = dev->dev_addr[i];
789 lp->init_block.filter[0] = 0x00000000;
790 lp->init_block.filter[1] = 0x00000000;
791 lp->init_block.rx_ring = ((u32)virt_to_bus(lp->rx_ring) & 0xffffff) | RX_RING_LEN_BITS;
792 lp->init_block.tx_ring = ((u32)virt_to_bus(lp->tx_ring) & 0xffffff) | TX_RING_LEN_BITS;
793 }
794
795 static void
796 lance_restart(struct net_device *dev, unsigned int csr0_bits, int must_reinit)
797 {
798 struct lance_private *lp = dev->priv;
799
800 if (must_reinit ||
801 (chip_table[lp->chip_version].flags & LANCE_MUST_REINIT_RING)) {
802 lance_purge_ring(dev);
803 lance_init_ring(dev, GFP_ATOMIC);
804 }
805 outw(0x0000, dev->base_addr + LANCE_ADDR);
806 outw(csr0_bits, dev->base_addr + LANCE_DATA);
807 }
808
809
810 static void lance_tx_timeout (struct net_device *dev)
811 {
812 struct lance_private *lp = (struct lance_private *) dev->priv;
813 int ioaddr = dev->base_addr;
814
815 outw (0, ioaddr + LANCE_ADDR);
816 printk ("%s: transmit timed out, status %4.4x, resetting.\n",
817 dev->name, inw (ioaddr + LANCE_DATA));
818 outw (0x0004, ioaddr + LANCE_DATA);
819 lp->stats.tx_errors++;
820 #ifndef final_version
821 if (lance_debug > 3) {
822 int i;
823 printk (" Ring data dump: dirty_tx %d cur_tx %d%s cur_rx %d.",
824 lp->dirty_tx, lp->cur_tx, netif_queue_stopped(dev) ? " (full)" : "",
825 lp->cur_rx);
826 for (i = 0; i < RX_RING_SIZE; i++)
827 printk ("%s %08x %04x %04x", i & 0x3 ? "" : "\n ",
828 lp->rx_ring[i].base, -lp->rx_ring[i].buf_length,
829 lp->rx_ring[i].msg_length);
830 for (i = 0; i < TX_RING_SIZE; i++)
831 printk ("%s %08x %04x %04x", i & 0x3 ? "" : "\n ",
832 lp->tx_ring[i].base, -lp->tx_ring[i].length,
833 lp->tx_ring[i].misc);
834 printk ("\n");
835 }
836 #endif
837 lance_restart (dev, 0x0043, 1);
838
839 dev->trans_start = jiffies;
840 netif_start_queue (dev);
841 }
842
843
844 static int lance_start_xmit(struct sk_buff *skb, struct net_device *dev)
845 {
846 struct lance_private *lp = dev->priv;
847 int ioaddr = dev->base_addr;
848 int entry;
849 unsigned long flags;
850
851 spin_lock_irqsave(&lp->devlock, flags);
852
853 if (lance_debug > 3) {
854 outw(0x0000, ioaddr+LANCE_ADDR);
855 printk("%s: lance_start_xmit() called, csr0 %4.4x.\n", dev->name,
856 inw(ioaddr+LANCE_DATA));
857 outw(0x0000, ioaddr+LANCE_DATA);
858 }
859
860 /* Fill in a Tx ring entry */
861
862 /* Mask to ring buffer boundary. */
863 entry = lp->cur_tx & TX_RING_MOD_MASK;
864
865 /* Caution: the write order is important here, set the base address
866 with the "ownership" bits last. */
867
868 /* The old LANCE chips doesn't automatically pad buffers to min. size. */
869 if (chip_table[lp->chip_version].flags & LANCE_MUST_PAD) {
870 lp->tx_ring[entry].length =
871 -(ETH_ZLEN < skb->len ? skb->len : ETH_ZLEN);
872 } else
873 lp->tx_ring[entry].length = -skb->len;
874
875 lp->tx_ring[entry].misc = 0x0000;
876
877 /* If any part of this buffer is >16M we must copy it to a low-memory
878 buffer. */
879 if ((u32)virt_to_bus(skb->data) + skb->len > 0x01000000) {
880 if (lance_debug > 5)
881 printk("%s: bouncing a high-memory packet (%#x).\n",
882 dev->name, (u32)virt_to_bus(skb->data));
883 memcpy(&lp->tx_bounce_buffs[entry], skb->data, skb->len);
884 lp->tx_ring[entry].base =
885 ((u32)virt_to_bus((lp->tx_bounce_buffs + entry)) & 0xffffff) | 0x83000000;
886 dev_kfree_skb(skb);
887 } else {
888 lp->tx_skbuff[entry] = skb;
889 lp->tx_ring[entry].base = ((u32)virt_to_bus(skb->data) & 0xffffff) | 0x83000000;
890 }
891 lp->cur_tx++;
892 lp->stats.tx_bytes += skb->len;
893
894 /* Trigger an immediate send poll. */
895 outw(0x0000, ioaddr+LANCE_ADDR);
896 outw(0x0048, ioaddr+LANCE_DATA);
897
898 dev->trans_start = jiffies;
899
900 if ((lp->cur_tx - lp->dirty_tx) >= TX_RING_SIZE)
901 netif_stop_queue(dev);
902
903 spin_unlock_irqrestore(&lp->devlock, flags);
904 return 0;
905 }
906
907 /* The LANCE interrupt handler. */
908 static void
909 lance_interrupt(int irq, void *dev_id, struct pt_regs * regs)
910 {
911 struct net_device *dev = dev_id;
912 struct lance_private *lp;
913 int csr0, ioaddr, boguscnt=10;
914 int must_restart;
915
916 if (dev == NULL) {
917 printk ("lance_interrupt(): irq %d for unknown device.\n", irq);
918 return;
919 }
920
921 ioaddr = dev->base_addr;
922 lp = dev->priv;
923
924 spin_lock (&lp->devlock);
925
926 outw(0x00, dev->base_addr + LANCE_ADDR);
927 while ((csr0 = inw(dev->base_addr + LANCE_DATA)) & 0x8600
928 && --boguscnt >= 0) {
929 /* Acknowledge all of the current interrupt sources ASAP. */
930 outw(csr0 & ~0x004f, dev->base_addr + LANCE_DATA);
931
932 must_restart = 0;
933
934 if (lance_debug > 5)
935 printk("%s: interrupt csr0=%#2.2x new csr=%#2.2x.\n",
936 dev->name, csr0, inw(dev->base_addr + LANCE_DATA));
937
938 if (csr0 & 0x0400) /* Rx interrupt */
939 lance_rx(dev);
940
941 if (csr0 & 0x0200) { /* Tx-done interrupt */
942 int dirty_tx = lp->dirty_tx;
943
944 while (dirty_tx < lp->cur_tx) {
945 int entry = dirty_tx & TX_RING_MOD_MASK;
946 int status = lp->tx_ring[entry].base;
947
948 if (status < 0)
949 break; /* It still hasn't been Txed */
950
951 lp->tx_ring[entry].base = 0;
952
953 if (status & 0x40000000) {
954 /* There was an major error, log it. */
955 int err_status = lp->tx_ring[entry].misc;
956 lp->stats.tx_errors++;
957 if (err_status & 0x0400) lp->stats.tx_aborted_errors++;
958 if (err_status & 0x0800) lp->stats.tx_carrier_errors++;
959 if (err_status & 0x1000) lp->stats.tx_window_errors++;
960 if (err_status & 0x4000) {
961 /* Ackk! On FIFO errors the Tx unit is turned off! */
962 lp->stats.tx_fifo_errors++;
963 /* Remove this verbosity later! */
964 printk("%s: Tx FIFO error! Status %4.4x.\n",
965 dev->name, csr0);
966 /* Restart the chip. */
967 must_restart = 1;
968 }
969 } else {
970 if (status & 0x18000000)
971 lp->stats.collisions++;
972 lp->stats.tx_packets++;
973 }
974
975 /* We must free the original skb if it's not a data-only copy
976 in the bounce buffer. */
977 if (lp->tx_skbuff[entry]) {
978 dev_kfree_skb_irq(lp->tx_skbuff[entry]);
979 lp->tx_skbuff[entry] = 0;
980 }
981 dirty_tx++;
982 }
983
984 #ifndef final_version
985 if (lp->cur_tx - dirty_tx >= TX_RING_SIZE) {
986 printk("out-of-sync dirty pointer, %d vs. %d, full=%s.\n",
987 dirty_tx, lp->cur_tx,
988 netif_queue_stopped(dev) ? "yes" : "no");
989 dirty_tx += TX_RING_SIZE;
990 }
991 #endif
992
993 /* if the ring is no longer full, accept more packets */
994 if (netif_queue_stopped(dev) &&
995 dirty_tx > lp->cur_tx - TX_RING_SIZE + 2)
996 netif_wake_queue (dev);
997
998 lp->dirty_tx = dirty_tx;
999 }
1000
1001 /* Log misc errors. */
1002 if (csr0 & 0x4000) lp->stats.tx_errors++; /* Tx babble. */
1003 if (csr0 & 0x1000) lp->stats.rx_errors++; /* Missed a Rx frame. */
1004 if (csr0 & 0x0800) {
1005 printk("%s: Bus master arbitration failure, status %4.4x.\n",
1006 dev->name, csr0);
1007 /* Restart the chip. */
1008 must_restart = 1;
1009 }
1010
1011 if (must_restart) {
1012 /* stop the chip to clear the error condition, then restart */
1013 outw(0x0000, dev->base_addr + LANCE_ADDR);
1014 outw(0x0004, dev->base_addr + LANCE_DATA);
1015 lance_restart(dev, 0x0002, 0);
1016 }
1017 }
1018
1019 /* Clear any other interrupt, and set interrupt enable. */
1020 outw(0x0000, dev->base_addr + LANCE_ADDR);
1021 outw(0x7940, dev->base_addr + LANCE_DATA);
1022
1023 if (lance_debug > 4)
1024 printk("%s: exiting interrupt, csr%d=%#4.4x.\n",
1025 dev->name, inw(ioaddr + LANCE_ADDR),
1026 inw(dev->base_addr + LANCE_DATA));
1027
1028 spin_unlock (&lp->devlock);
1029 }
1030
1031 static int
1032 lance_rx(struct net_device *dev)
1033 {
1034 struct lance_private *lp = dev->priv;
1035 int entry = lp->cur_rx & RX_RING_MOD_MASK;
1036 int i;
1037
1038 /* If we own the next entry, it's a new packet. Send it up. */
1039 while (lp->rx_ring[entry].base >= 0) {
1040 int status = lp->rx_ring[entry].base >> 24;
1041
1042 if (status != 0x03) { /* There was an error. */
1043 /* There is a tricky error noted by John Murphy,
1044 <murf@perftech.com> to Russ Nelson: Even with full-sized
1045 buffers it's possible for a jabber packet to use two
1046 buffers, with only the last correctly noting the error. */
1047 if (status & 0x01) /* Only count a general error at the */
1048 lp->stats.rx_errors++; /* end of a packet.*/
1049 if (status & 0x20) lp->stats.rx_frame_errors++;
1050 if (status & 0x10) lp->stats.rx_over_errors++;
1051 if (status & 0x08) lp->stats.rx_crc_errors++;
1052 if (status & 0x04) lp->stats.rx_fifo_errors++;
1053 lp->rx_ring[entry].base &= 0x03ffffff;
1054 }
1055 else
1056 {
1057 /* Malloc up new buffer, compatible with net3. */
1058 short pkt_len = (lp->rx_ring[entry].msg_length & 0xfff)-4;
1059 struct sk_buff *skb;
1060
1061 if(pkt_len<60)
1062 {
1063 printk("%s: Runt packet!\n",dev->name);
1064 lp->stats.rx_errors++;
1065 }
1066 else
1067 {
1068 skb = dev_alloc_skb(pkt_len+2);
1069 if (skb == NULL)
1070 {
1071 printk("%s: Memory squeeze, deferring packet.\n", dev->name);
1072 for (i=0; i < RX_RING_SIZE; i++)
1073 if (lp->rx_ring[(entry+i) & RX_RING_MOD_MASK].base < 0)
1074 break;
1075
1076 if (i > RX_RING_SIZE -2)
1077 {
1078 lp->stats.rx_dropped++;
1079 lp->rx_ring[entry].base |= 0x80000000;
1080 lp->cur_rx++;
1081 }
1082 break;
1083 }
1084 skb->dev = dev;
1085 skb_reserve(skb,2); /* 16 byte align */
1086 skb_put(skb,pkt_len); /* Make room */
1087 eth_copy_and_sum(skb,
1088 (unsigned char *)bus_to_virt((lp->rx_ring[entry].base & 0x00ffffff)),
1089 pkt_len,0);
1090 lp->stats.rx_bytes+=skb->len;
1091 skb->protocol=eth_type_trans(skb,dev);
1092 lp->stats.rx_packets++;
1093 netif_rx(skb);
1094 }
1095 }
1096 /* The docs say that the buffer length isn't touched, but Andrew Boyd
1097 of QNX reports that some revs of the 79C965 clear it. */
1098 lp->rx_ring[entry].buf_length = -PKT_BUF_SZ;
1099 lp->rx_ring[entry].base |= 0x80000000;
1100 entry = (++lp->cur_rx) & RX_RING_MOD_MASK;
1101 }
1102
1103 /* We should check that at least two ring entries are free. If not,
1104 we should free one and mark stats->rx_dropped++. */
1105
1106 return 0;
1107 }
1108
1109 static int
1110 lance_close(struct net_device *dev)
1111 {
1112 int ioaddr = dev->base_addr;
1113 struct lance_private *lp = dev->priv;
1114
1115 netif_stop_queue (dev);
1116
1117 if (chip_table[lp->chip_version].flags & LANCE_HAS_MISSED_FRAME) {
1118 outw(112, ioaddr+LANCE_ADDR);
1119 lp->stats.rx_missed_errors = inw(ioaddr+LANCE_DATA);
1120 }
1121 outw(0, ioaddr+LANCE_ADDR);
1122
1123 if (lance_debug > 1)
1124 printk("%s: Shutting down ethercard, status was %2.2x.\n",
1125 dev->name, inw(ioaddr+LANCE_DATA));
1126
1127 /* We stop the LANCE here -- it occasionally polls
1128 memory if we don't. */
1129 outw(0x0004, ioaddr+LANCE_DATA);
1130
1131 if (dev->dma != 4)
1132 {
1133 unsigned long flags=claim_dma_lock();
1134 disable_dma(dev->dma);
1135 release_dma_lock(flags);
1136 }
1137 free_irq(dev->irq, dev);
1138
1139 lance_purge_ring(dev);
1140
1141 return 0;
1142 }
1143
1144 static struct net_device_stats *lance_get_stats(struct net_device *dev)
1145 {
1146 struct lance_private *lp = dev->priv;
1147
1148 if (chip_table[lp->chip_version].flags & LANCE_HAS_MISSED_FRAME) {
1149 short ioaddr = dev->base_addr;
1150 short saved_addr;
1151 unsigned long flags;
1152
1153 spin_lock_irqsave(&lp->devlock, flags);
1154 saved_addr = inw(ioaddr+LANCE_ADDR);
1155 outw(112, ioaddr+LANCE_ADDR);
1156 lp->stats.rx_missed_errors = inw(ioaddr+LANCE_DATA);
1157 outw(saved_addr, ioaddr+LANCE_ADDR);
1158 spin_unlock_irqrestore(&lp->devlock, flags);
1159 }
1160
1161 return &lp->stats;
1162 }
1163
1164 /* Set or clear the multicast filter for this adaptor.
1165 */
1166
1167 static void set_multicast_list(struct net_device *dev)
1168 {
1169 short ioaddr = dev->base_addr;
1170
1171 outw(0, ioaddr+LANCE_ADDR);
1172 outw(0x0004, ioaddr+LANCE_DATA); /* Temporarily stop the lance. */
1173
1174 if (dev->flags&IFF_PROMISC) {
1175 /* Log any net taps. */
1176 printk("%s: Promiscuous mode enabled.\n", dev->name);
1177 outw(15, ioaddr+LANCE_ADDR);
1178 outw(0x8000, ioaddr+LANCE_DATA); /* Set promiscuous mode */
1179 } else {
1180 short multicast_table[4];
1181 int i;
1182 int num_addrs=dev->mc_count;
1183 if(dev->flags&IFF_ALLMULTI)
1184 num_addrs=1;
1185 /* FIXIT: We don't use the multicast table, but rely on upper-layer filtering. */
1186 memset(multicast_table, (num_addrs == 0) ? 0 : -1, sizeof(multicast_table));
1187 for (i = 0; i < 4; i++) {
1188 outw(8 + i, ioaddr+LANCE_ADDR);
1189 outw(multicast_table[i], ioaddr+LANCE_DATA);
1190 }
1191 outw(15, ioaddr+LANCE_ADDR);
1192 outw(0x0000, ioaddr+LANCE_DATA); /* Unset promiscuous mode */
1193 }
1194
1195 lance_restart(dev, 0x0142, 0); /* Resume normal operation */
1196
1197 }
1198
1199
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