1 /* smc-ultra32.c: An SMC Ultra32 EISA ethernet driver for linux.
2
3 Sources:
4
5 This driver is based on (cloned from) the ISA SMC Ultra driver
6 written by Donald Becker. Modifications to support the EISA
7 version of the card by Paul Gortmaker and Leonard N. Zubkoff.
8
9 This software may be used and distributed according to the terms
10 of the GNU Public License, incorporated herein by reference.
11
12 Theory of Operation:
13
14 The SMC Ultra32C card uses the SMC 83c790 chip which is also
15 found on the ISA SMC Ultra cards. It has a shared memory mode of
16 operation that makes it similar to the ISA version of the card.
17 The main difference is that the EISA card has 32KB of RAM, but
18 only an 8KB window into that memory. The EISA card also can be
19 set for a bus-mastering mode of operation via the ECU, but that
20 is not (and probably will never be) supported by this driver.
21 The ECU should be run to enable shared memory and to disable the
22 bus-mastering feature for use with linux.
23
24 By programming the 8390 to use only 8KB RAM, the modifications
25 to the ISA driver can be limited to the probe and initialization
26 code. This allows easy integration of EISA support into the ISA
27 driver. However, the driver development kit from SMC provided the
28 register information for sliding the 8KB window, and hence the 8390
29 is programmed to use the full 32KB RAM.
30
31 Unfortunately this required code changes outside the probe/init
32 routines, and thus we decided to separate the EISA driver from
33 the ISA one. In this way, ISA users don't end up with a larger
34 driver due to the EISA code, and EISA users don't end up with a
35 larger driver due to the ISA EtherEZ PIO code. The driver is
36 similar to the 3c503/16 driver, in that the window must be set
37 back to the 1st 8KB of space for access to the two 8390 Tx slots.
38
39 In testing, using only 8KB RAM (3 Tx / 5 Rx) didn't appear to
40 be a limiting factor, since the EISA bus could get packets off
41 the card fast enough, but having the use of lots of RAM as Rx
42 space is extra insurance if interrupt latencies become excessive.
43
44 */
45
46 static const char *version = "smc-ultra32.c: 06/97 v1.00\n";
47
48
49 #include <linux/module.h>
50 #include <linux/kernel.h>
51 #include <linux/sched.h>
52 #include <linux/errno.h>
53 #include <linux/string.h>
54 #include <linux/init.h>
55
56 #include <asm/io.h>
57 #include <asm/system.h>
58
59 #include <linux/netdevice.h>
60 #include <linux/etherdevice.h>
61 #include "8390.h"
62
63 int ultra32_probe(struct net_device *dev);
64 static int ultra32_probe1(struct net_device *dev, int ioaddr);
65 static int ultra32_open(struct net_device *dev);
66 static void ultra32_reset_8390(struct net_device *dev);
67 static void ultra32_get_8390_hdr(struct net_device *dev, struct e8390_pkt_hdr *hdr,
68 int ring_page);
69 static void ultra32_block_input(struct net_device *dev, int count,
70 struct sk_buff *skb, int ring_offset);
71 static void ultra32_block_output(struct net_device *dev, int count,
72 const unsigned char *buf,
73 const int start_page);
74 static int ultra32_close(struct net_device *dev);
75
76 #define ULTRA32_CMDREG 0 /* Offset to ASIC command register. */
77 #define ULTRA32_RESET 0x80 /* Board reset, in ULTRA32_CMDREG. */
78 #define ULTRA32_MEMENB 0x40 /* Enable the shared memory. */
79 #define ULTRA32_NIC_OFFSET 16 /* NIC register offset from the base_addr. */
80 #define ULTRA32_IO_EXTENT 32
81 #define EN0_ERWCNT 0x08 /* Early receive warning count. */
82
83 /*
84 * Defines that apply only to the Ultra32 EISA card. Note that
85 * "smc" = 10011 01101 00011 = 0x4da3, and hence !smc8010.cfg translates
86 * into an EISA ID of 0x1080A34D
87 */
88 #define ULTRA32_BASE 0xca0
89 #define ULTRA32_ID 0x1080a34d
90 #define ULTRA32_IDPORT (-0x20) /* 0xc80 */
91 /* Config regs 1->7 from the EISA !SMC8010.CFG file. */
92 #define ULTRA32_CFG1 0x04 /* 0xca4 */
93 #define ULTRA32_CFG2 0x05 /* 0xca5 */
94 #define ULTRA32_CFG3 (-0x18) /* 0xc88 */
95 #define ULTRA32_CFG4 (-0x17) /* 0xc89 */
96 #define ULTRA32_CFG5 (-0x16) /* 0xc8a */
97 #define ULTRA32_CFG6 (-0x15) /* 0xc8b */
98 #define ULTRA32_CFG7 0x0d /* 0xcad */
99
100
101 /* Probe for the Ultra32. This looks like a 8013 with the station
102 address PROM at I/O ports <base>+8 to <base>+13, with a checksum
103 following.
104 */
105
106 int __init ultra32_probe(struct net_device *dev)
107 {
108 int ioaddr;
109
110 if (!EISA_bus) return -ENODEV;
111
112 SET_MODULE_OWNER(dev);
113
114 /* EISA spec allows for up to 16 slots, but 8 is typical. */
115 for (ioaddr = 0x1000 + ULTRA32_BASE; ioaddr < 0x9000; ioaddr += 0x1000)
116 if (ultra32_probe1(dev, ioaddr) == 0)
117 return 0;
118
119 return -ENODEV;
120 }
121
122 static int __init ultra32_probe1(struct net_device *dev, int ioaddr)
123 {
124 int i, edge, media, retval;
125 int checksum = 0;
126 const char *model_name;
127 static unsigned version_printed;
128 /* Values from various config regs. */
129 unsigned char idreg;
130 unsigned char reg4;
131 const char *ifmap[] = {"UTP No Link", "", "UTP/AUI", "UTP/BNC"};
132
133 if (!request_region(ioaddr, ULTRA32_IO_EXTENT, dev->name))
134 return -EBUSY;
135
136 if (inb(ioaddr + ULTRA32_IDPORT) == 0xff ||
137 inl(ioaddr + ULTRA32_IDPORT) != ULTRA32_ID) {
138 retval = -ENODEV;
139 goto out;
140 }
141
142 media = inb(ioaddr + ULTRA32_CFG7) & 0x03;
143 edge = inb(ioaddr + ULTRA32_CFG5) & 0x08;
144 printk("SMC Ultra32 in EISA Slot %d, Media: %s, %s IRQs.\n",
145 ioaddr >> 12, ifmap[media],
146 (edge ? "Edge Triggered" : "Level Sensitive"));
147
148 idreg = inb(ioaddr + 7);
149 reg4 = inb(ioaddr + 4) & 0x7f;
150
151 /* Check the ID nibble. */
152 if ((idreg & 0xf0) != 0x20) { /* SMC Ultra */
153 retval = -ENODEV;
154 goto out;
155 }
156
157 /* Select the station address register set. */
158 outb(reg4, ioaddr + 4);
159
160 for (i = 0; i < 8; i++)
161 checksum += inb(ioaddr + 8 + i);
162 if ((checksum & 0xff) != 0xff) {
163 retval = -ENODEV;
164 goto out;
165 }
166
167 if (ei_debug && version_printed++ == 0)
168 printk(version);
169
170 model_name = "SMC Ultra32";
171
172 printk("%s: %s at 0x%X,", dev->name, model_name, ioaddr);
173
174 for (i = 0; i < 6; i++)
175 printk(" %2.2X", dev->dev_addr[i] = inb(ioaddr + 8 + i));
176
177 /* Switch from the station address to the alternate register set and
178 read the useful registers there. */
179 outb(0x80 | reg4, ioaddr + 4);
180
181 /* Enable FINE16 mode to avoid BIOS ROM width mismatches @ reboot. */
182 outb(0x80 | inb(ioaddr + 0x0c), ioaddr + 0x0c);
183
184 /* Reset RAM addr. */
185 outb(0x00, ioaddr + 0x0b);
186
187 /* Switch back to the station address register set so that the
188 MS-DOS driver can find the card after a warm boot. */
189 outb(reg4, ioaddr + 4);
190
191 if ((inb(ioaddr + ULTRA32_CFG5) & 0x40) == 0) {
192 printk("\nsmc-ultra32: Card RAM is disabled! "
193 "Run EISA config utility.\n");
194 retval = -ENODEV;
195 goto out;
196 }
197 if ((inb(ioaddr + ULTRA32_CFG2) & 0x04) == 0)
198 printk("\nsmc-ultra32: Ignoring Bus-Master enable bit. "
199 "Run EISA config utility.\n");
200
201 if (dev->irq < 2) {
202 unsigned char irqmap[] = {0, 9, 3, 5, 7, 10, 11, 15};
203 int irq = irqmap[inb(ioaddr + ULTRA32_CFG5) & 0x07];
204 if (irq == 0) {
205 printk(", failed to detect IRQ line.\n");
206 retval = -EAGAIN;
207 goto out;
208 }
209 dev->irq = irq;
210 }
211
212 /* Allocate dev->priv and fill in 8390 specific dev fields. */
213 if (ethdev_init(dev)) {
214 printk (", no memory for dev->priv.\n");
215 retval = -ENOMEM;
216 goto out;
217 }
218
219 /* The 8390 isn't at the base address, so fake the offset */
220 dev->base_addr = ioaddr + ULTRA32_NIC_OFFSET;
221
222 /* Save RAM address in the unused reg0 to avoid excess inb's. */
223 ei_status.reg0 = inb(ioaddr + ULTRA32_CFG3) & 0xfc;
224
225 dev->mem_start = 0xc0000 + ((ei_status.reg0 & 0x7c) << 11);
226
227 ei_status.name = model_name;
228 ei_status.word16 = 1;
229 ei_status.tx_start_page = 0;
230 ei_status.rx_start_page = TX_PAGES;
231 /* All Ultra32 cards have 32KB memory with an 8KB window. */
232 ei_status.stop_page = 128;
233
234 dev->rmem_start = dev->mem_start + TX_PAGES*256;
235 dev->mem_end = dev->rmem_end = dev->mem_start + 0x1fff;
236
237 printk(", IRQ %d, 32KB memory, 8KB window at 0x%lx-0x%lx.\n",
238 dev->irq, dev->mem_start, dev->mem_end);
239 ei_status.block_input = &ultra32_block_input;
240 ei_status.block_output = &ultra32_block_output;
241 ei_status.get_8390_hdr = &ultra32_get_8390_hdr;
242 ei_status.reset_8390 = &ultra32_reset_8390;
243 dev->open = &ultra32_open;
244 dev->stop = &ultra32_close;
245 NS8390_init(dev, 0);
246
247 return 0;
248 out:
249 release_region(ioaddr, ULTRA32_IO_EXTENT);
250 return retval;
251 }
252
253 static int ultra32_open(struct net_device *dev)
254 {
255 int ioaddr = dev->base_addr - ULTRA32_NIC_OFFSET; /* ASIC addr */
256 int irq_flags = (inb(ioaddr + ULTRA32_CFG5) & 0x08) ? 0 : SA_SHIRQ;
257 int retval;
258
259 retval = request_irq(dev->irq, ei_interrupt, irq_flags, dev->name, dev);
260 if (retval)
261 return retval;
262
263 outb(ULTRA32_MEMENB, ioaddr); /* Enable Shared Memory. */
264 outb(0x80, ioaddr + ULTRA32_CFG6); /* Enable Interrupts. */
265 outb(0x84, ioaddr + 5); /* Enable MEM16 & Disable Bus Master. */
266 outb(0x01, ioaddr + 6); /* Enable Interrupts. */
267 /* Set the early receive warning level in window 0 high enough not
268 to receive ERW interrupts. */
269 outb_p(E8390_NODMA+E8390_PAGE0, dev->base_addr);
270 outb(0xff, dev->base_addr + EN0_ERWCNT);
271 ei_open(dev);
272 return 0;
273 }
274
275 static int ultra32_close(struct net_device *dev)
276 {
277 int ioaddr = dev->base_addr - ULTRA32_NIC_OFFSET; /* CMDREG */
278
279 netif_stop_queue(dev);
280
281 if (ei_debug > 1)
282 printk("%s: Shutting down ethercard.\n", dev->name);
283
284 outb(0x00, ioaddr + ULTRA32_CFG6); /* Disable Interrupts. */
285 outb(0x00, ioaddr + 6); /* Disable interrupts. */
286 free_irq(dev->irq, dev);
287
288 NS8390_init(dev, 0);
289
290 return 0;
291 }
292
293 static void ultra32_reset_8390(struct net_device *dev)
294 {
295 int ioaddr = dev->base_addr - ULTRA32_NIC_OFFSET; /* ASIC base addr */
296
297 outb(ULTRA32_RESET, ioaddr);
298 if (ei_debug > 1) printk("resetting Ultra32, t=%ld...", jiffies);
299 ei_status.txing = 0;
300
301 outb(ULTRA32_MEMENB, ioaddr); /* Enable Shared Memory. */
302 outb(0x80, ioaddr + ULTRA32_CFG6); /* Enable Interrupts. */
303 outb(0x84, ioaddr + 5); /* Enable MEM16 & Disable Bus Master. */
304 outb(0x01, ioaddr + 6); /* Enable Interrupts. */
305 if (ei_debug > 1) printk("reset done\n");
306 return;
307 }
308
309 /* Grab the 8390 specific header. Similar to the block_input routine, but
310 we don't need to be concerned with ring wrap as the header will be at
311 the start of a page, so we optimize accordingly. */
312
313 static void ultra32_get_8390_hdr(struct net_device *dev,
314 struct e8390_pkt_hdr *hdr,
315 int ring_page)
316 {
317 unsigned long hdr_start = dev->mem_start + ((ring_page & 0x1f) << 8);
318 unsigned int RamReg = dev->base_addr - ULTRA32_NIC_OFFSET + ULTRA32_CFG3;
319
320 /* Select correct 8KB Window. */
321 outb(ei_status.reg0 | ((ring_page & 0x60) >> 5), RamReg);
322
323 #ifdef notdef
324 /* Officially this is what we are doing, but the readl() is faster */
325 isa_memcpy_fromio(hdr, hdr_start, sizeof(struct e8390_pkt_hdr));
326 #else
327 ((unsigned int*)hdr)[0] = isa_readl(hdr_start);
328 #endif
329 }
330
331 /* Block input and output are easy on shared memory ethercards, the only
332 complication is when the ring buffer wraps, or in this case, when a
333 packet spans an 8KB boundary. Note that the current 8KB segment is
334 already set by the get_8390_hdr routine. */
335
336 static void ultra32_block_input(struct net_device *dev,
337 int count,
338 struct sk_buff *skb,
339 int ring_offset)
340 {
341 unsigned long xfer_start = dev->mem_start + (ring_offset & 0x1fff);
342 unsigned int RamReg = dev->base_addr - ULTRA32_NIC_OFFSET + ULTRA32_CFG3;
343
344 if ((ring_offset & ~0x1fff) != ((ring_offset + count - 1) & ~0x1fff)) {
345 int semi_count = 8192 - (ring_offset & 0x1FFF);
346 isa_memcpy_fromio(skb->data, xfer_start, semi_count);
347 count -= semi_count;
348 if (ring_offset < 96*256) {
349 /* Select next 8KB Window. */
350 ring_offset += semi_count;
351 outb(ei_status.reg0 | ((ring_offset & 0x6000) >> 13), RamReg);
352 isa_memcpy_fromio(skb->data + semi_count, dev->mem_start, count);
353 } else {
354 /* Select first 8KB Window. */
355 outb(ei_status.reg0, RamReg);
356 isa_memcpy_fromio(skb->data + semi_count, dev->rmem_start, count);
357 }
358 } else {
359 /* Packet is in one chunk -- we can copy + cksum. */
360 isa_eth_io_copy_and_sum(skb, xfer_start, count, 0);
361 }
362 }
363
364 static void ultra32_block_output(struct net_device *dev,
365 int count,
366 const unsigned char *buf,
367 int start_page)
368 {
369 unsigned long xfer_start = dev->mem_start + (start_page<<8);
370 unsigned int RamReg = dev->base_addr - ULTRA32_NIC_OFFSET + ULTRA32_CFG3;
371
372 /* Select first 8KB Window. */
373 outb(ei_status.reg0, RamReg);
374
375 isa_memcpy_toio(xfer_start, buf, count);
376 }
377
378 #ifdef MODULE
379 #define MAX_ULTRA32_CARDS 4 /* Max number of Ultra cards per module */
380 static struct net_device dev_ultra[MAX_ULTRA32_CARDS];
381
382 int init_module(void)
383 {
384 int this_dev, found = 0;
385
386 for (this_dev = 0; this_dev < MAX_ULTRA32_CARDS; this_dev++) {
387 struct net_device *dev = &dev_ultra[this_dev];
388 dev->init = ultra32_probe;
389 if (register_netdev(dev) != 0) {
390 if (found > 0) { /* Got at least one. */
391 return 0;
392 }
393 printk(KERN_WARNING "smc-ultra32.c: No SMC Ultra32 found.\n");
394 return -ENXIO;
395 }
396 found++;
397 }
398 return 0;
399 }
400
401 void cleanup_module(void)
402 {
403 int this_dev;
404
405 for (this_dev = 0; this_dev < MAX_ULTRA32_CARDS; this_dev++) {
406 struct net_device *dev = &dev_ultra[this_dev];
407 if (dev->priv != NULL) {
408 int ioaddr = dev->base_addr - ULTRA32_NIC_OFFSET;
409 void *priv = dev->priv;
410 /* NB: ultra32_close_card() does free_irq */
411 release_region(ioaddr, ULTRA32_IO_EXTENT);
412 unregister_netdev(dev);
413 kfree(priv);
414 }
415 }
416 }
417 #endif /* MODULE */
418
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