1 /* $Id: sunlance.c,v 1.105 2000/10/22 16:08:38 davem Exp $
2 * lance.c: Linux/Sparc/Lance driver
3 *
4 * Written 1995, 1996 by Miguel de Icaza
5 * Sources:
6 * The Linux depca driver
7 * The Linux lance driver.
8 * The Linux skeleton driver.
9 * The NetBSD Sparc/Lance driver.
10 * Theo de Raadt (deraadt@openbsd.org)
11 * NCR92C990 Lan Controller manual
12 *
13 * 1.4:
14 * Added support to run with a ledma on the Sun4m
15 *
16 * 1.5:
17 * Added multiple card detection.
18 *
19 * 4/17/96: Burst sizes and tpe selection on sun4m by Eddie C. Dost
20 * (ecd@skynet.be)
21 *
22 * 5/15/96: auto carrier detection on sun4m by Eddie C. Dost
23 * (ecd@skynet.be)
24 *
25 * 5/17/96: lebuffer on scsi/ether cards now work David S. Miller
26 * (davem@caip.rutgers.edu)
27 *
28 * 5/29/96: override option 'tpe-link-test?', if it is 'false', as
29 * this disables auto carrier detection on sun4m. Eddie C. Dost
30 * (ecd@skynet.be)
31 *
32 * 1.7:
33 * 6/26/96: Bug fix for multiple ledmas, miguel.
34 *
35 * 1.8:
36 * Stole multicast code from depca.c, fixed lance_tx.
37 *
38 * 1.9:
39 * 8/21/96: Fixed the multicast code (Pedro Roque)
40 *
41 * 8/28/96: Send fake packet in lance_open() if auto_select is true,
42 * so we can detect the carrier loss condition in time.
43 * Eddie C. Dost (ecd@skynet.be)
44 *
45 * 9/15/96: Align rx_buf so that eth_copy_and_sum() won't cause an
46 * MNA trap during chksum_partial_copy(). (ecd@skynet.be)
47 *
48 * 11/17/96: Handle LE_C0_MERR in lance_interrupt(). (ecd@skynet.be)
49 *
50 * 12/22/96: Don't loop forever in lance_rx() on incomplete packets.
51 * This was the sun4c killer. Shit, stupid bug.
52 * (ecd@skynet.be)
53 *
54 * 1.10:
55 * 1/26/97: Modularize driver. (ecd@skynet.be)
56 *
57 * 1.11:
58 * 12/27/97: Added sun4d support. (jj@sunsite.mff.cuni.cz)
59 *
60 * 1.12:
61 * 11/3/99: Fixed SMP race in lance_start_xmit found by davem.
62 * Anton Blanchard (anton@progsoc.uts.edu.au)
63 * 2.00: 11/9/99: Massive overhaul and port to new SBUS driver interfaces.
64 * David S. Miller (davem@redhat.com)
65 */
66
67 #undef DEBUG_DRIVER
68
69 static char *version =
70 "sunlance.c:v2.00 11/Sep/99 Miguel de Icaza (miguel@nuclecu.unam.mx)\n";
71
72 static char *lancestr = "LANCE";
73
74 #include <linux/config.h>
75 #include <linux/module.h>
76
77 #include <linux/kernel.h>
78 #include <linux/sched.h>
79 #include <linux/types.h>
80 #include <linux/fcntl.h>
81 #include <linux/interrupt.h>
82 #include <linux/ptrace.h>
83 #include <linux/ioport.h>
84 #include <linux/in.h>
85 #include <linux/malloc.h>
86 #include <linux/string.h>
87 #include <linux/delay.h>
88 #include <linux/init.h>
89 #include <asm/system.h>
90 #include <asm/bitops.h>
91 #include <asm/io.h>
92 #include <asm/dma.h>
93 #include <asm/pgtable.h>
94 #include <linux/errno.h>
95 #include <asm/byteorder.h> /* Used by the checksum routines */
96
97 /* Used for the temporal inet entries and routing */
98 #include <linux/socket.h>
99 #include <linux/route.h>
100
101 #include <asm/idprom.h>
102 #include <asm/sbus.h>
103 #include <asm/openprom.h>
104 #include <asm/oplib.h>
105 #include <asm/auxio.h> /* For tpe-link-test? setting */
106 #include <asm/irq.h>
107
108 #include <linux/netdevice.h>
109 #include <linux/etherdevice.h>
110 #include <linux/skbuff.h>
111
112 /* Define: 2^4 Tx buffers and 2^4 Rx buffers */
113 #ifndef LANCE_LOG_TX_BUFFERS
114 #define LANCE_LOG_TX_BUFFERS 4
115 #define LANCE_LOG_RX_BUFFERS 4
116 #endif
117
118 #define CRC_POLYNOMIAL_BE 0x04c11db7UL /* Ethernet CRC, big endian */
119 #define CRC_POLYNOMIAL_LE 0xedb88320UL /* Ethernet CRC, little endian */
120
121 #define LE_CSR0 0
122 #define LE_CSR1 1
123 #define LE_CSR2 2
124 #define LE_CSR3 3
125
126 #define LE_MO_PROM 0x8000 /* Enable promiscuous mode */
127
128 #define LE_C0_ERR 0x8000 /* Error: set if BAB, SQE, MISS or ME is set */
129 #define LE_C0_BABL 0x4000 /* BAB: Babble: tx timeout. */
130 #define LE_C0_CERR 0x2000 /* SQE: Signal quality error */
131 #define LE_C0_MISS 0x1000 /* MISS: Missed a packet */
132 #define LE_C0_MERR 0x0800 /* ME: Memory error */
133 #define LE_C0_RINT 0x0400 /* Received interrupt */
134 #define LE_C0_TINT 0x0200 /* Transmitter Interrupt */
135 #define LE_C0_IDON 0x0100 /* IFIN: Init finished. */
136 #define LE_C0_INTR 0x0080 /* Interrupt or error */
137 #define LE_C0_INEA 0x0040 /* Interrupt enable */
138 #define LE_C0_RXON 0x0020 /* Receiver on */
139 #define LE_C0_TXON 0x0010 /* Transmitter on */
140 #define LE_C0_TDMD 0x0008 /* Transmitter demand */
141 #define LE_C0_STOP 0x0004 /* Stop the card */
142 #define LE_C0_STRT 0x0002 /* Start the card */
143 #define LE_C0_INIT 0x0001 /* Init the card */
144
145 #define LE_C3_BSWP 0x4 /* SWAP */
146 #define LE_C3_ACON 0x2 /* ALE Control */
147 #define LE_C3_BCON 0x1 /* Byte control */
148
149 /* Receive message descriptor 1 */
150 #define LE_R1_OWN 0x80 /* Who owns the entry */
151 #define LE_R1_ERR 0x40 /* Error: if FRA, OFL, CRC or BUF is set */
152 #define LE_R1_FRA 0x20 /* FRA: Frame error */
153 #define LE_R1_OFL 0x10 /* OFL: Frame overflow */
154 #define LE_R1_CRC 0x08 /* CRC error */
155 #define LE_R1_BUF 0x04 /* BUF: Buffer error */
156 #define LE_R1_SOP 0x02 /* Start of packet */
157 #define LE_R1_EOP 0x01 /* End of packet */
158 #define LE_R1_POK 0x03 /* Packet is complete: SOP + EOP */
159
160 #define LE_T1_OWN 0x80 /* Lance owns the packet */
161 #define LE_T1_ERR 0x40 /* Error summary */
162 #define LE_T1_EMORE 0x10 /* Error: more than one retry needed */
163 #define LE_T1_EONE 0x08 /* Error: one retry needed */
164 #define LE_T1_EDEF 0x04 /* Error: deferred */
165 #define LE_T1_SOP 0x02 /* Start of packet */
166 #define LE_T1_EOP 0x01 /* End of packet */
167 #define LE_T1_POK 0x03 /* Packet is complete: SOP + EOP */
168
169 #define LE_T3_BUF 0x8000 /* Buffer error */
170 #define LE_T3_UFL 0x4000 /* Error underflow */
171 #define LE_T3_LCOL 0x1000 /* Error late collision */
172 #define LE_T3_CLOS 0x0800 /* Error carrier loss */
173 #define LE_T3_RTY 0x0400 /* Error retry */
174 #define LE_T3_TDR 0x03ff /* Time Domain Reflectometry counter */
175
176 #define TX_RING_SIZE (1 << (LANCE_LOG_TX_BUFFERS))
177 #define TX_RING_MOD_MASK (TX_RING_SIZE - 1)
178 #define TX_RING_LEN_BITS ((LANCE_LOG_TX_BUFFERS) << 29)
179 #define TX_NEXT(__x) (((__x)+1) & TX_RING_MOD_MASK)
180
181 #define RX_RING_SIZE (1 << (LANCE_LOG_RX_BUFFERS))
182 #define RX_RING_MOD_MASK (RX_RING_SIZE - 1)
183 #define RX_RING_LEN_BITS ((LANCE_LOG_RX_BUFFERS) << 29)
184 #define RX_NEXT(__x) (((__x)+1) & RX_RING_MOD_MASK)
185
186 #define PKT_BUF_SZ 1544
187 #define RX_BUFF_SIZE PKT_BUF_SZ
188 #define TX_BUFF_SIZE PKT_BUF_SZ
189
190 struct lance_rx_desc {
191 u16 rmd0; /* low address of packet */
192 u8 rmd1_bits; /* descriptor bits */
193 u8 rmd1_hadr; /* high address of packet */
194 s16 length; /* This length is 2s complement (negative)!
195 * Buffer length
196 */
197 u16 mblength; /* This is the actual number of bytes received */
198 };
199
200 struct lance_tx_desc {
201 u16 tmd0; /* low address of packet */
202 u8 tmd1_bits; /* descriptor bits */
203 u8 tmd1_hadr; /* high address of packet */
204 s16 length; /* Length is 2s complement (negative)! */
205 u16 misc;
206 };
207
208 /* The LANCE initialization block, described in databook. */
209 /* On the Sparc, this block should be on a DMA region */
210 struct lance_init_block {
211 u16 mode; /* Pre-set mode (reg. 15) */
212 u8 phys_addr[6]; /* Physical ethernet address */
213 u32 filter[2]; /* Multicast filter. */
214
215 /* Receive and transmit ring base, along with extra bits. */
216 u16 rx_ptr; /* receive descriptor addr */
217 u16 rx_len; /* receive len and high addr */
218 u16 tx_ptr; /* transmit descriptor addr */
219 u16 tx_len; /* transmit len and high addr */
220
221 /* The Tx and Rx ring entries must aligned on 8-byte boundaries. */
222 struct lance_rx_desc brx_ring[RX_RING_SIZE];
223 struct lance_tx_desc btx_ring[TX_RING_SIZE];
224
225 u8 tx_buf [TX_RING_SIZE][TX_BUFF_SIZE];
226 u8 pad[2]; /* align rx_buf for copy_and_sum(). */
227 u8 rx_buf [RX_RING_SIZE][RX_BUFF_SIZE];
228 };
229
230 #define libdesc_offset(rt, elem) \
231 ((__u32)(((unsigned long)(&(((struct lance_init_block *)0)->rt[elem])))))
232
233 #define libbuff_offset(rt, elem) \
234 ((__u32)(((unsigned long)(&(((struct lance_init_block *)0)->rt[elem][0])))))
235
236 struct lance_private {
237 unsigned long lregs; /* Lance RAP/RDP regs. */
238 unsigned long dregs; /* DMA controller regs. */
239 volatile struct lance_init_block *init_block;
240
241 spinlock_t lock;
242
243 int rx_new, tx_new;
244 int rx_old, tx_old;
245
246 struct net_device_stats stats;
247 struct sbus_dma *ledma; /* If set this points to ledma */
248 char tpe; /* cable-selection is TPE */
249 char auto_select; /* cable-selection by carrier */
250 char burst_sizes; /* ledma SBus burst sizes */
251 char pio_buffer; /* init block in PIO space? */
252
253 unsigned short busmaster_regval;
254
255 void (*init_ring)(struct net_device *);
256 void (*rx)(struct net_device *);
257 void (*tx)(struct net_device *);
258
259 char *name;
260 __u32 init_block_dvma;
261 struct net_device *dev; /* Backpointer */
262 struct lance_private *next_module;
263 struct sbus_dev *sdev;
264 struct timer_list multicast_timer;
265 };
266
267 #define TX_BUFFS_AVAIL ((lp->tx_old<=lp->tx_new)?\
268 lp->tx_old+TX_RING_MOD_MASK-lp->tx_new:\
269 lp->tx_old - lp->tx_new-1)
270
271 /* Lance registers. */
272 #define RDP 0x00UL /* register data port */
273 #define RAP 0x02UL /* register address port */
274 #define LANCE_REG_SIZE 0x04UL
275
276 #define STOP_LANCE(__lp) \
277 do { unsigned long __base = (__lp)->lregs; \
278 sbus_writew(LE_CSR0, __base + RAP); \
279 sbus_writew(LE_C0_STOP, __base + RDP); \
280 } while (0)
281
282 int sparc_lance_debug = 2;
283
284 /* The Lance uses 24 bit addresses */
285 /* On the Sun4c the DVMA will provide the remaining bytes for us */
286 /* On the Sun4m we have to instruct the ledma to provide them */
287 /* Even worse, on scsi/ether SBUS cards, the init block and the
288 * transmit/receive buffers are addresses as offsets from absolute
289 * zero on the lebuffer PIO area. -DaveM
290 */
291
292 #define LANCE_ADDR(x) ((long)(x) & ~0xff000000)
293
294 static struct lance_private *root_lance_dev = NULL;
295
296 /* Load the CSR registers */
297 static void load_csrs(struct lance_private *lp)
298 {
299 u32 leptr;
300
301 if (lp->pio_buffer)
302 leptr = 0;
303 else
304 leptr = LANCE_ADDR(lp->init_block_dvma);
305
306 sbus_writew(LE_CSR1, lp->lregs + RAP);
307 sbus_writew(leptr & 0xffff, lp->lregs + RDP);
308 sbus_writew(LE_CSR2, lp->lregs + RAP);
309 sbus_writew(leptr >> 16, lp->lregs + RDP);
310 sbus_writew(LE_CSR3, lp->lregs + RAP);
311 sbus_writew(lp->busmaster_regval, lp->lregs + RDP);
312
313 /* Point back to csr0 */
314 sbus_writew(LE_CSR0, lp->lregs + RAP);
315 }
316
317 /* Setup the Lance Rx and Tx rings */
318 static void lance_init_ring_dvma(struct net_device *dev)
319 {
320 struct lance_private *lp = (struct lance_private *) dev->priv;
321 volatile struct lance_init_block *ib = lp->init_block;
322 __u32 aib = lp->init_block_dvma;
323 __u32 leptr;
324 int i;
325
326 /* Lock out other processes while setting up hardware */
327 netif_stop_queue(dev);
328 lp->rx_new = lp->tx_new = 0;
329 lp->rx_old = lp->tx_old = 0;
330
331 /* Copy the ethernet address to the lance init block
332 * Note that on the sparc you need to swap the ethernet address.
333 */
334 ib->phys_addr [0] = dev->dev_addr [1];
335 ib->phys_addr [1] = dev->dev_addr [0];
336 ib->phys_addr [2] = dev->dev_addr [3];
337 ib->phys_addr [3] = dev->dev_addr [2];
338 ib->phys_addr [4] = dev->dev_addr [5];
339 ib->phys_addr [5] = dev->dev_addr [4];
340
341 /* Setup the Tx ring entries */
342 for (i = 0; i <= TX_RING_SIZE; i++) {
343 leptr = LANCE_ADDR(aib + libbuff_offset(tx_buf, i));
344 ib->btx_ring [i].tmd0 = leptr;
345 ib->btx_ring [i].tmd1_hadr = leptr >> 16;
346 ib->btx_ring [i].tmd1_bits = 0;
347 ib->btx_ring [i].length = 0xf000; /* The ones required by tmd2 */
348 ib->btx_ring [i].misc = 0;
349 }
350
351 /* Setup the Rx ring entries */
352 for (i = 0; i < RX_RING_SIZE; i++) {
353 leptr = LANCE_ADDR(aib + libbuff_offset(rx_buf, i));
354
355 ib->brx_ring [i].rmd0 = leptr;
356 ib->brx_ring [i].rmd1_hadr = leptr >> 16;
357 ib->brx_ring [i].rmd1_bits = LE_R1_OWN;
358 ib->brx_ring [i].length = -RX_BUFF_SIZE | 0xf000;
359 ib->brx_ring [i].mblength = 0;
360 }
361
362 /* Setup the initialization block */
363
364 /* Setup rx descriptor pointer */
365 leptr = LANCE_ADDR(aib + libdesc_offset(brx_ring, 0));
366 ib->rx_len = (LANCE_LOG_RX_BUFFERS << 13) | (leptr >> 16);
367 ib->rx_ptr = leptr;
368
369 /* Setup tx descriptor pointer */
370 leptr = LANCE_ADDR(aib + libdesc_offset(btx_ring, 0));
371 ib->tx_len = (LANCE_LOG_TX_BUFFERS << 13) | (leptr >> 16);
372 ib->tx_ptr = leptr;
373 }
374
375 static void lance_init_ring_pio(struct net_device *dev)
376 {
377 struct lance_private *lp = (struct lance_private *) dev->priv;
378 volatile struct lance_init_block *ib = lp->init_block;
379 u32 leptr;
380 int i;
381
382 /* Lock out other processes while setting up hardware */
383 netif_stop_queue(dev);
384 lp->rx_new = lp->tx_new = 0;
385 lp->rx_old = lp->tx_old = 0;
386
387 /* Copy the ethernet address to the lance init block
388 * Note that on the sparc you need to swap the ethernet address.
389 */
390 sbus_writeb(dev->dev_addr[1], &ib->phys_addr[0]);
391 sbus_writeb(dev->dev_addr[0], &ib->phys_addr[1]);
392 sbus_writeb(dev->dev_addr[3], &ib->phys_addr[2]);
393 sbus_writeb(dev->dev_addr[2], &ib->phys_addr[3]);
394 sbus_writeb(dev->dev_addr[5], &ib->phys_addr[4]);
395 sbus_writeb(dev->dev_addr[4], &ib->phys_addr[5]);
396
397 /* Setup the Tx ring entries */
398 for (i = 0; i <= TX_RING_SIZE; i++) {
399 leptr = libbuff_offset(tx_buf, i);
400 sbus_writew(leptr, &ib->btx_ring [i].tmd0);
401 sbus_writeb(leptr >> 16,&ib->btx_ring [i].tmd1_hadr);
402 sbus_writeb(0, &ib->btx_ring [i].tmd1_bits);
403
404 /* The ones required by tmd2 */
405 sbus_writew(0xf000, &ib->btx_ring [i].length);
406 sbus_writew(0, &ib->btx_ring [i].misc);
407 }
408
409 /* Setup the Rx ring entries */
410 for (i = 0; i < RX_RING_SIZE; i++) {
411 leptr = libbuff_offset(rx_buf, i);
412
413 sbus_writew(leptr, &ib->brx_ring [i].rmd0);
414 sbus_writeb(leptr >> 16,&ib->brx_ring [i].rmd1_hadr);
415 sbus_writeb(LE_R1_OWN, &ib->brx_ring [i].rmd1_bits);
416 sbus_writew(-RX_BUFF_SIZE|0xf000,
417 &ib->brx_ring [i].length);
418 sbus_writew(0, &ib->brx_ring [i].mblength);
419 }
420
421 /* Setup the initialization block */
422
423 /* Setup rx descriptor pointer */
424 leptr = libdesc_offset(brx_ring, 0);
425 sbus_writew((LANCE_LOG_RX_BUFFERS << 13) | (leptr >> 16),
426 &ib->rx_len);
427 sbus_writew(leptr, &ib->rx_ptr);
428
429 /* Setup tx descriptor pointer */
430 leptr = libdesc_offset(btx_ring, 0);
431 sbus_writew((LANCE_LOG_TX_BUFFERS << 13) | (leptr >> 16),
432 &ib->tx_len);
433 sbus_writew(leptr, &ib->tx_ptr);
434 }
435
436 static void init_restart_ledma(struct lance_private *lp)
437 {
438 u32 csr = sbus_readl(lp->dregs + DMA_CSR);
439
440 if (!(csr & DMA_HNDL_ERROR)) {
441 /* E-Cache draining */
442 while (sbus_readl(lp->dregs + DMA_CSR) & DMA_FIFO_ISDRAIN)
443 barrier();
444 }
445
446 csr = sbus_readl(lp->dregs + DMA_CSR);
447 csr &= ~DMA_E_BURSTS;
448 if (lp->burst_sizes & DMA_BURST32)
449 csr |= DMA_E_BURST32;
450 else
451 csr |= DMA_E_BURST16;
452
453 csr |= (DMA_DSBL_RD_DRN | DMA_DSBL_WR_INV | DMA_FIFO_INV);
454
455 if (lp->tpe)
456 csr |= DMA_EN_ENETAUI;
457 else
458 csr &= ~DMA_EN_ENETAUI;
459 udelay(20);
460 sbus_writel(csr, lp->dregs + DMA_CSR);
461 udelay(200);
462 }
463
464 static int init_restart_lance(struct lance_private *lp)
465 {
466 u16 regval = 0;
467 int i;
468
469 if (lp->dregs)
470 init_restart_ledma(lp);
471
472 sbus_writew(LE_CSR0, lp->lregs + RAP);
473 sbus_writew(LE_C0_INIT, lp->lregs + RDP);
474
475 /* Wait for the lance to complete initialization */
476 for (i = 0; i < 100; i++) {
477 regval = sbus_readw(lp->lregs + RDP);
478
479 if (regval & (LE_C0_ERR | LE_C0_IDON))
480 break;
481 barrier();
482 }
483 if (i == 100 || (regval & LE_C0_ERR)) {
484 printk(KERN_ERR "LANCE unopened after %d ticks, csr0=%4.4x.\n",
485 i, regval);
486 if (lp->dregs)
487 printk("dcsr=%8.8x\n", sbus_readl(lp->dregs + DMA_CSR));
488 return -1;
489 }
490
491 /* Clear IDON by writing a "1", enable interrupts and start lance */
492 sbus_writew(LE_C0_IDON, lp->lregs + RDP);
493 sbus_writew(LE_C0_INEA | LE_C0_STRT, lp->lregs + RDP);
494
495 if (lp->dregs) {
496 u32 csr = sbus_readl(lp->dregs + DMA_CSR);
497
498 csr |= DMA_INT_ENAB;
499 sbus_writel(csr, lp->dregs + DMA_CSR);
500 }
501
502 return 0;
503 }
504
505 static void lance_rx_dvma(struct net_device *dev)
506 {
507 struct lance_private *lp = (struct lance_private *) dev->priv;
508 volatile struct lance_init_block *ib = lp->init_block;
509 volatile struct lance_rx_desc *rd;
510 u8 bits;
511 int len, entry = lp->rx_new;
512 struct sk_buff *skb;
513
514 for (rd = &ib->brx_ring [entry];
515 !((bits = rd->rmd1_bits) & LE_R1_OWN);
516 rd = &ib->brx_ring [entry]) {
517
518 /* We got an incomplete frame? */
519 if ((bits & LE_R1_POK) != LE_R1_POK) {
520 lp->stats.rx_over_errors++;
521 lp->stats.rx_errors++;
522 } else if (bits & LE_R1_ERR) {
523 /* Count only the end frame as a rx error,
524 * not the beginning
525 */
526 if (bits & LE_R1_BUF) lp->stats.rx_fifo_errors++;
527 if (bits & LE_R1_CRC) lp->stats.rx_crc_errors++;
528 if (bits & LE_R1_OFL) lp->stats.rx_over_errors++;
529 if (bits & LE_R1_FRA) lp->stats.rx_frame_errors++;
530 if (bits & LE_R1_EOP) lp->stats.rx_errors++;
531 } else {
532 len = (rd->mblength & 0xfff) - 4;
533 skb = dev_alloc_skb(len + 2);
534
535 if (skb == NULL) {
536 printk(KERN_INFO "%s: Memory squeeze, deferring packet.\n",
537 dev->name);
538 lp->stats.rx_dropped++;
539 rd->mblength = 0;
540 rd->rmd1_bits = LE_R1_OWN;
541 lp->rx_new = RX_NEXT(entry);
542 return;
543 }
544
545 lp->stats.rx_bytes += len;
546
547 skb->dev = dev;
548 skb_reserve(skb, 2); /* 16 byte align */
549 skb_put(skb, len); /* make room */
550 eth_copy_and_sum(skb,
551 (unsigned char *)&(ib->rx_buf [entry][0]),
552 len, 0);
553 skb->protocol = eth_type_trans(skb, dev);
554 netif_rx(skb);
555 lp->stats.rx_packets++;
556 }
557
558 /* Return the packet to the pool */
559 rd->mblength = 0;
560 rd->rmd1_bits = LE_R1_OWN;
561 entry = RX_NEXT(entry);
562 }
563
564 lp->rx_new = entry;
565 }
566
567 static void lance_tx_dvma(struct net_device *dev)
568 {
569 struct lance_private *lp = (struct lance_private *) dev->priv;
570 volatile struct lance_init_block *ib = lp->init_block;
571 int i, j;
572
573 spin_lock(&lp->lock);
574
575 j = lp->tx_old;
576 for (i = j; i != lp->tx_new; i = j) {
577 volatile struct lance_tx_desc *td = &ib->btx_ring [i];
578 u8 bits = td->tmd1_bits;
579
580 /* If we hit a packet not owned by us, stop */
581 if (bits & LE_T1_OWN)
582 break;
583
584 if (bits & LE_T1_ERR) {
585 u16 status = td->misc;
586
587 lp->stats.tx_errors++;
588 if (status & LE_T3_RTY) lp->stats.tx_aborted_errors++;
589 if (status & LE_T3_LCOL) lp->stats.tx_window_errors++;
590
591 if (status & LE_T3_CLOS) {
592 lp->stats.tx_carrier_errors++;
593 if (lp->auto_select) {
594 lp->tpe = 1 - lp->tpe;
595 printk(KERN_NOTICE "%s: Carrier Lost, trying %s\n",
596 dev->name, lp->tpe?"TPE":"AUI");
597 STOP_LANCE(lp);
598 lp->init_ring(dev);
599 load_csrs(lp);
600 init_restart_lance(lp);
601 goto out;
602 }
603 }
604
605 /* Buffer errors and underflows turn off the
606 * transmitter, restart the adapter.
607 */
608 if (status & (LE_T3_BUF|LE_T3_UFL)) {
609 lp->stats.tx_fifo_errors++;
610
611 printk(KERN_ERR "%s: Tx: ERR_BUF|ERR_UFL, restarting\n",
612 dev->name);
613 STOP_LANCE(lp);
614 lp->init_ring(dev);
615 load_csrs(lp);
616 init_restart_lance(lp);
617 goto out;
618 }
619 } else if ((bits & LE_T1_POK) == LE_T1_POK) {
620 /*
621 * So we don't count the packet more than once.
622 */
623 td->tmd1_bits = bits & ~(LE_T1_POK);
624
625 /* One collision before packet was sent. */
626 if (bits & LE_T1_EONE)
627 lp->stats.collisions++;
628
629 /* More than one collision, be optimistic. */
630 if (bits & LE_T1_EMORE)
631 lp->stats.collisions += 2;
632
633 lp->stats.tx_packets++;
634 }
635
636 j = TX_NEXT(j);
637 }
638 lp->tx_old = j;
639 out:
640 if (netif_queue_stopped(dev) &&
641 TX_BUFFS_AVAIL > 0)
642 netif_wake_queue(dev);
643
644 spin_unlock(&lp->lock);
645 }
646
647 static void lance_piocopy_to_skb(struct sk_buff *skb, volatile void *piobuf, int len)
648 {
649 u16 *p16 = (u16 *) skb->data;
650 u32 *p32;
651 u8 *p8;
652 unsigned long pbuf = (unsigned long) piobuf;
653
654 /* We know here that both src and dest are on a 16bit boundry. */
655 *p16++ = sbus_readw(pbuf);
656 p32 = (u32 *) p16;
657 pbuf += 2;
658 len -= 2;
659
660 while (len >= 4) {
661 *p32++ = sbus_readl(pbuf);
662 pbuf += 4;
663 len -= 4;
664 }
665 p8 = (u8 *) p32;
666 if (len >= 2) {
667 p16 = (u16 *) p32;
668 *p16++ = sbus_readw(pbuf);
669 pbuf += 2;
670 len -= 2;
671 p8 = (u8 *) p16;
672 }
673 if (len >= 1)
674 *p8 = sbus_readb(pbuf);
675 }
676
677 static void lance_rx_pio(struct net_device *dev)
678 {
679 struct lance_private *lp = (struct lance_private *) dev->priv;
680 volatile struct lance_init_block *ib = lp->init_block;
681 volatile struct lance_rx_desc *rd;
682 unsigned char bits;
683 int len, entry;
684 struct sk_buff *skb;
685
686 entry = lp->rx_new;
687 for (rd = &ib->brx_ring [entry];
688 !((bits = sbus_readb(&rd->rmd1_bits)) & LE_R1_OWN);
689 rd = &ib->brx_ring [entry]) {
690
691 /* We got an incomplete frame? */
692 if ((bits & LE_R1_POK) != LE_R1_POK) {
693 lp->stats.rx_over_errors++;
694 lp->stats.rx_errors++;
695 } else if (bits & LE_R1_ERR) {
696 /* Count only the end frame as a rx error,
697 * not the beginning
698 */
699 if (bits & LE_R1_BUF) lp->stats.rx_fifo_errors++;
700 if (bits & LE_R1_CRC) lp->stats.rx_crc_errors++;
701 if (bits & LE_R1_OFL) lp->stats.rx_over_errors++;
702 if (bits & LE_R1_FRA) lp->stats.rx_frame_errors++;
703 if (bits & LE_R1_EOP) lp->stats.rx_errors++;
704 } else {
705 len = (sbus_readw(&rd->mblength) & 0xfff) - 4;
706 skb = dev_alloc_skb(len + 2);
707
708 if (skb == NULL) {
709 printk(KERN_INFO "%s: Memory squeeze, deferring packet.\n",
710 dev->name);
711 lp->stats.rx_dropped++;
712 sbus_writew(0, &rd->mblength);
713 sbus_writeb(LE_R1_OWN, &rd->rmd1_bits);
714 lp->rx_new = RX_NEXT(entry);
715 return;
716 }
717
718 lp->stats.rx_bytes += len;
719
720 skb->dev = dev;
721 skb_reserve (skb, 2); /* 16 byte align */
722 skb_put(skb, len); /* make room */
723 lance_piocopy_to_skb(skb, &(ib->rx_buf[entry][0]), len);
724 skb->protocol = eth_type_trans(skb, dev);
725 netif_rx(skb);
726 lp->stats.rx_packets++;
727 }
728
729 /* Return the packet to the pool */
730 sbus_writew(0, &rd->mblength);
731 sbus_writeb(LE_R1_OWN, &rd->rmd1_bits);
732 entry = RX_NEXT(entry);
733 }
734
735 lp->rx_new = entry;
736 }
737
738 static void lance_tx_pio(struct net_device *dev)
739 {
740 struct lance_private *lp = (struct lance_private *) dev->priv;
741 volatile struct lance_init_block *ib = lp->init_block;
742 int i, j;
743
744 spin_lock(&lp->lock);
745
746 j = lp->tx_old;
747 for (i = j; i != lp->tx_new; i = j) {
748 volatile struct lance_tx_desc *td = &ib->btx_ring [i];
749 u8 bits = sbus_readb(&td->tmd1_bits);
750
751 /* If we hit a packet not owned by us, stop */
752 if (bits & LE_T1_OWN)
753 break;
754
755 if (bits & LE_T1_ERR) {
756 u16 status = sbus_readw(&td->misc);
757
758 lp->stats.tx_errors++;
759 if (status & LE_T3_RTY) lp->stats.tx_aborted_errors++;
760 if (status & LE_T3_LCOL) lp->stats.tx_window_errors++;
761
762 if (status & LE_T3_CLOS) {
763 lp->stats.tx_carrier_errors++;
764 if (lp->auto_select) {
765 lp->tpe = 1 - lp->tpe;
766 printk(KERN_NOTICE "%s: Carrier Lost, trying %s\n",
767 dev->name, lp->tpe?"TPE":"AUI");
768 STOP_LANCE(lp);
769 lp->init_ring(dev);
770 load_csrs(lp);
771 init_restart_lance(lp);
772 goto out;
773 }
774 }
775
776 /* Buffer errors and underflows turn off the
777 * transmitter, restart the adapter.
778 */
779 if (status & (LE_T3_BUF|LE_T3_UFL)) {
780 lp->stats.tx_fifo_errors++;
781
782 printk(KERN_ERR "%s: Tx: ERR_BUF|ERR_UFL, restarting\n",
783 dev->name);
784 STOP_LANCE(lp);
785 lp->init_ring(dev);
786 load_csrs(lp);
787 init_restart_lance(lp);
788 goto out;
789 }
790 } else if ((bits & LE_T1_POK) == LE_T1_POK) {
791 /*
792 * So we don't count the packet more than once.
793 */
794 sbus_writeb(bits & ~(LE_T1_POK), &td->tmd1_bits);
795
796 /* One collision before packet was sent. */
797 if (bits & LE_T1_EONE)
798 lp->stats.collisions++;
799
800 /* More than one collision, be optimistic. */
801 if (bits & LE_T1_EMORE)
802 lp->stats.collisions += 2;
803
804 lp->stats.tx_packets++;
805 }
806
807 j = TX_NEXT(j);
808 }
809 lp->tx_old = j;
810
811 if (netif_queue_stopped(dev) &&
812 TX_BUFFS_AVAIL > 0)
813 netif_wake_queue(dev);
814 out:
815 spin_unlock(&lp->lock);
816 }
817
818 static void lance_interrupt(int irq, void *dev_id, struct pt_regs *regs)
819 {
820 struct net_device *dev = (struct net_device *)dev_id;
821 struct lance_private *lp = (struct lance_private *)dev->priv;
822 int csr0;
823
824 sbus_writew(LE_CSR0, lp->lregs + RAP);
825 csr0 = sbus_readw(lp->lregs + RDP);
826
827 /* Acknowledge all the interrupt sources ASAP */
828 sbus_writew(csr0 & (LE_C0_INTR | LE_C0_TINT | LE_C0_RINT),
829 lp->lregs + RDP);
830
831 if ((csr0 & LE_C0_ERR) != 0) {
832 /* Clear the error condition */
833 sbus_writew((LE_C0_BABL | LE_C0_ERR | LE_C0_MISS |
834 LE_C0_CERR | LE_C0_MERR),
835 lp->lregs + RDP);
836 }
837
838 if (csr0 & LE_C0_RINT)
839 lp->rx(dev);
840
841 if (csr0 & LE_C0_TINT)
842 lp->tx(dev);
843
844 if (csr0 & LE_C0_BABL)
845 lp->stats.tx_errors++;
846
847 if (csr0 & LE_C0_MISS)
848 lp->stats.rx_errors++;
849
850 if (csr0 & LE_C0_MERR) {
851 if (lp->dregs) {
852 u32 addr = sbus_readl(lp->dregs + DMA_ADDR);
853
854 printk(KERN_ERR "%s: Memory error, status %04x, addr %06x\n",
855 dev->name, csr0, addr & 0xffffff);
856 } else {
857 printk(KERN_ERR "%s: Memory error, status %04x\n",
858 dev->name, csr0);
859 }
860
861 sbus_writew(LE_C0_STOP, lp->lregs + RDP);
862
863 if (lp->dregs) {
864 u32 dma_csr = sbus_readl(lp->dregs + DMA_CSR);
865
866 dma_csr |= DMA_FIFO_INV;
867 sbus_writel(dma_csr, lp->dregs + DMA_CSR);
868 }
869
870 lp->init_ring(dev);
871 load_csrs(lp);
872 init_restart_lance(lp);
873 netif_wake_queue(dev);
874 }
875
876 sbus_writew(LE_C0_INEA, lp->lregs + RDP);
877 }
878
879 /* Build a fake network packet and send it to ourselves. */
880 static void build_fake_packet(struct lance_private *lp)
881 {
882 struct net_device *dev = lp->dev;
883 volatile struct lance_init_block *ib = lp->init_block;
884 u16 *packet;
885 struct ethhdr *eth;
886 int i, entry;
887
888 entry = lp->tx_new & TX_RING_MOD_MASK;
889 packet = (u16 *) &(ib->tx_buf[entry][0]);
890 eth = (struct ethhdr *) packet;
891 if (lp->pio_buffer) {
892 for (i = 0; i < (ETH_ZLEN / sizeof(u16)); i++)
893 sbus_writew(0, &packet[i]);
894 for (i = 0; i < 6; i++) {
895 sbus_writeb(dev->dev_addr[i], ð->h_dest[i]);
896 sbus_writeb(dev->dev_addr[i], ð->h_source[i]);
897 }
898 sbus_writew((-ETH_ZLEN) | 0xf000, &ib->btx_ring[entry].length);
899 sbus_writew(0, &ib->btx_ring[entry].misc);
900 sbus_writeb(LE_T1_POK|LE_T1_OWN, &ib->btx_ring[entry].tmd1_bits);
901 } else {
902 memset(packet, 0, ETH_ZLEN);
903 for (i = 0; i < 6; i++) {
904 eth->h_dest[i] = dev->dev_addr[i];
905 eth->h_source[i] = dev->dev_addr[i];
906 }
907 ib->btx_ring[entry].length = (-ETH_ZLEN) | 0xf000;
908 ib->btx_ring[entry].misc = 0;
909 ib->btx_ring[entry].tmd1_bits = (LE_T1_POK|LE_T1_OWN);
910 }
911 lp->tx_new = TX_NEXT(entry);
912 }
913
914 struct net_device *last_dev = 0;
915
916 static int lance_open(struct net_device *dev)
917 {
918 struct lance_private *lp = (struct lance_private *)dev->priv;
919 volatile struct lance_init_block *ib = lp->init_block;
920 int status = 0;
921
922 last_dev = dev;
923
924 if (request_irq(dev->irq, &lance_interrupt, SA_SHIRQ,
925 lancestr, (void *) dev)) {
926 printk(KERN_ERR "Lance: Can't get irq %s\n", __irq_itoa(dev->irq));
927 return -EAGAIN;
928 }
929
930 STOP_LANCE(lp);
931
932 /* On the 4m, setup the ledma to provide the upper bits for buffers */
933 if (lp->dregs) {
934 u32 regval = lp->init_block_dvma & 0xff000000;
935
936 sbus_writel(regval, lp->dregs + DMA_TEST);
937 }
938
939 /* Set mode and clear multicast filter only at device open,
940 * so that lance_init_ring() called at any error will not
941 * forget multicast filters.
942 *
943 * BTW it is common bug in all lance drivers! --ANK
944 */
945 if (lp->pio_buffer) {
946 sbus_writew(0, &ib->mode);
947 sbus_writel(0, &ib->filter[0]);
948 sbus_writel(0, &ib->filter[1]);
949 } else {
950 ib->mode = 0;
951 ib->filter [0] = 0;
952 ib->filter [1] = 0;
953 }
954
955 lp->init_ring(dev);
956 load_csrs(lp);
957
958 netif_start_queue(dev);
959
960 status = init_restart_lance(lp);
961 if (!status && lp->auto_select) {
962 build_fake_packet(lp);
963 sbus_writew(LE_C0_INEA | LE_C0_TDMD, lp->lregs + RDP);
964 }
965
966 if (!status)
967 MOD_INC_USE_COUNT;
968
969 return status;
970 }
971
972 static int lance_close(struct net_device *dev)
973 {
974 struct lance_private *lp = (struct lance_private *) dev->priv;
975
976 netif_stop_queue(dev);
977 del_timer_sync(&lp->multicast_timer);
978
979 STOP_LANCE(lp);
980
981 free_irq(dev->irq, (void *) dev);
982 MOD_DEC_USE_COUNT;
983 return 0;
984 }
985
986 static int lance_reset(struct net_device *dev)
987 {
988 struct lance_private *lp = (struct lance_private *) dev->priv;
989 int status;
990
991 STOP_LANCE(lp);
992
993 /* On the 4m, reset the dma too */
994 if (lp->dregs) {
995 u32 csr, addr;
996
997 printk(KERN_ERR "resetting ledma\n");
998 csr = sbus_readl(lp->dregs + DMA_CSR);
999 sbus_writel(csr | DMA_RST_ENET, lp->dregs + DMA_CSR);
1000 udelay(200);
1001 sbus_writel(csr & ~DMA_RST_ENET, lp->dregs + DMA_CSR);
1002
1003 addr = lp->init_block_dvma & 0xff000000;
1004 sbus_writel(addr, lp->dregs + DMA_TEST);
1005 }
1006 lp->init_ring(dev);
1007 load_csrs(lp);
1008 dev->trans_start = jiffies;
1009 status = init_restart_lance(lp);
1010 return status;
1011 }
1012
1013 static void lance_piocopy_from_skb(volatile void *dest, unsigned char *src, int len)
1014 {
1015 unsigned long piobuf = (unsigned long) dest;
1016 u32 *p32;
1017 u16 *p16;
1018 u8 *p8;
1019
1020 switch ((unsigned long)src & 0x3) {
1021 case 0:
1022 p32 = (u32 *) src;
1023 while (len >= 4) {
1024 sbus_writel(*p32, piobuf);
1025 p32++;
1026 piobuf += 4;
1027 len -= 4;
1028 }
1029 src = (char *) p32;
1030 break;
1031 case 1:
1032 case 3:
1033 p8 = (u8 *) src;
1034 while (len >= 4) {
1035 u32 val;
1036
1037 val = p8[0] << 24;
1038 val |= p8[1] << 16;
1039 val |= p8[2] << 8;
1040 val |= p8[3];
1041 sbus_writel(val, piobuf);
1042 p8 += 4;
1043 piobuf += 4;
1044 len -= 4;
1045 }
1046 src = (char *) p8;
1047 break;
1048 case 2:
1049 p16 = (u16 *) src;
1050 while (len >= 4) {
1051 u32 val = p16[0]<<16 | p16[1];
1052 sbus_writel(val, piobuf);
1053 p16 += 2;
1054 piobuf += 4;
1055 len -= 4;
1056 }
1057 src = (char *) p16;
1058 break;
1059 };
1060 if (len >= 2) {
1061 u16 val = src[0] << 8 | src[1];
1062 sbus_writew(val, piobuf);
1063 src += 2;
1064 piobuf += 2;
1065 len -= 2;
1066 }
1067 if (len >= 1)
1068 sbus_writeb(src[0], piobuf);
1069 }
1070
1071 static void lance_piozero(volatile void *dest, int len)
1072 {
1073 unsigned long piobuf = (unsigned long) dest;
1074
1075 if (piobuf & 1) {
1076 sbus_writeb(0, piobuf);
1077 piobuf += 1;
1078 len -= 1;
1079 if (len == 0)
1080 return;
1081 }
1082 if (len == 1) {
1083 sbus_writeb(0, piobuf);
1084 return;
1085 }
1086 if (piobuf & 2) {
1087 sbus_writew(0, piobuf);
1088 piobuf += 2;
1089 len -= 2;
1090 if (len == 0)
1091 return;
1092 }
1093 while (len >= 4) {
1094 sbus_writel(0, piobuf);
1095 piobuf += 4;
1096 len -= 4;
1097 }
1098 if (len >= 2) {
1099 sbus_writew(0, piobuf);
1100 piobuf += 2;
1101 len -= 2;
1102 }
1103 if (len >= 1)
1104 sbus_writeb(0, piobuf);
1105 }
1106
1107 static void lance_tx_timeout(struct net_device *dev)
1108 {
1109 struct lance_private *lp = (struct lance_private *) dev->priv;
1110
1111 printk(KERN_ERR "%s: transmit timed out, status %04x, reset\n",
1112 dev->name, sbus_readw(lp->lregs + RDP));
1113 lance_reset(dev);
1114 netif_wake_queue(dev);
1115 }
1116
1117 static int lance_start_xmit(struct sk_buff *skb, struct net_device *dev)
1118 {
1119 struct lance_private *lp = (struct lance_private *) dev->priv;
1120 volatile struct lance_init_block *ib = lp->init_block;
1121 int entry, skblen, len;
1122
1123 skblen = skb->len;
1124
1125 len = (skblen <= ETH_ZLEN) ? ETH_ZLEN : skblen;
1126
1127 spin_lock_irq(&lp->lock);
1128
1129 lp->stats.tx_bytes += len;
1130
1131 entry = lp->tx_new & TX_RING_MOD_MASK;
1132 if (lp->pio_buffer) {
1133 sbus_writew((-len) | 0xf000, &ib->btx_ring[entry].length);
1134 sbus_writew(0, &ib->btx_ring[entry].misc);
1135 lance_piocopy_from_skb(&ib->tx_buf[entry][0], skb->data, skblen);
1136 if (len != skblen)
1137 lance_piozero(&ib->tx_buf[entry][skblen], len - skblen);
1138 sbus_writeb(LE_T1_POK | LE_T1_OWN, &ib->btx_ring[entry].tmd1_bits);
1139 } else {
1140 ib->btx_ring [entry].length = (-len) | 0xf000;
1141 ib->btx_ring [entry].misc = 0;
1142 memcpy((char *)&ib->tx_buf [entry][0], skb->data, skblen);
1143 if (len != skblen)
1144 memset((char *) &ib->tx_buf [entry][skblen], 0, len - skblen);
1145 ib->btx_ring [entry].tmd1_bits = (LE_T1_POK | LE_T1_OWN);
1146 }
1147
1148 lp->tx_new = TX_NEXT(entry);
1149
1150 if (TX_BUFFS_AVAIL <= 0)
1151 netif_stop_queue(dev);
1152
1153 /* Kick the lance: transmit now */
1154 sbus_writew(LE_C0_INEA | LE_C0_TDMD, lp->lregs + RDP);
1155
1156 /* Read back CSR to invalidate the E-Cache.
1157 * This is needed, because DMA_DSBL_WR_INV is set.
1158 */
1159 if (lp->dregs)
1160 sbus_readw(lp->lregs + RDP);
1161
1162 spin_unlock_irq(&lp->lock);
1163
1164 dev->trans_start = jiffies;
1165 dev_kfree_skb(skb);
1166
1167 return 0;
1168 }
1169
1170 static struct net_device_stats *lance_get_stats(struct net_device *dev)
1171 {
1172 struct lance_private *lp = (struct lance_private *) dev->priv;
1173
1174 return &lp->stats;
1175 }
1176
1177 /* taken from the depca driver */
1178 static void lance_load_multicast(struct net_device *dev)
1179 {
1180 struct lance_private *lp = (struct lance_private *) dev->priv;
1181 volatile struct lance_init_block *ib = lp->init_block;
1182 volatile u16 *mcast_table = (u16 *) &ib->filter;
1183 struct dev_mc_list *dmi = dev->mc_list;
1184 char *addrs;
1185 int i, j, bit, byte;
1186 u32 crc, poly = CRC_POLYNOMIAL_LE;
1187
1188 /* set all multicast bits */
1189 if (dev->flags & IFF_ALLMULTI) {
1190 if (lp->pio_buffer) {
1191 sbus_writel(0xffffffff, &ib->filter[0]);
1192 sbus_writel(0xffffffff, &ib->filter[1]);
1193 } else {
1194 ib->filter [0] = 0xffffffff;
1195 ib->filter [1] = 0xffffffff;
1196 }
1197 return;
1198 }
1199 /* clear the multicast filter */
1200 if (lp->pio_buffer) {
1201 sbus_writel(0, &ib->filter[0]);
1202 sbus_writel(0, &ib->filter[1]);
1203 } else {
1204 ib->filter [0] = 0;
1205 ib->filter [1] = 0;
1206 }
1207
1208 /* Add addresses */
1209 for (i = 0; i < dev->mc_count; i++) {
1210 addrs = dmi->dmi_addr;
1211 dmi = dmi->next;
1212
1213 /* multicast address? */
1214 if (!(*addrs & 1))
1215 continue;
1216
1217 crc = 0xffffffff;
1218 for (byte = 0; byte < 6; byte++) {
1219 for (bit = *addrs++, j = 0; j < 8; j++, bit >>= 1) {
1220 int test;
1221
1222 test = ((bit ^ crc) & 0x01);
1223 crc >>= 1;
1224
1225 if (test)
1226 crc = crc ^ poly;
1227 }
1228 }
1229 crc = crc >> 26;
1230 if (lp->pio_buffer) {
1231 u16 tmp = sbus_readw(&mcast_table[crc>>4]);
1232 tmp |= 1 << (crc & 0xf);
1233 sbus_writew(tmp, &mcast_table[crc>>4]);
1234 } else {
1235 mcast_table [crc >> 4] |= 1 << (crc & 0xf);
1236 }
1237 }
1238 }
1239
1240 static void lance_set_multicast(struct net_device *dev)
1241 {
1242 struct lance_private *lp = (struct lance_private *) dev->priv;
1243 volatile struct lance_init_block *ib = lp->init_block;
1244 u16 mode;
1245
1246 if (!netif_running(dev))
1247 return;
1248
1249 if (lp->tx_old != lp->tx_new) {
1250 mod_timer(&lp->multicast_timer, jiffies + 4);
1251 netif_wake_queue(dev);
1252 return;
1253 }
1254
1255 netif_stop_queue(dev);
1256
1257 STOP_LANCE(lp);
1258 lp->init_ring(dev);
1259
1260 if (lp->pio_buffer)
1261 mode = sbus_readw(&ib->mode);
1262 else
1263 mode = ib->mode;
1264 if (dev->flags & IFF_PROMISC) {
1265 mode |= LE_MO_PROM;
1266 if (lp->pio_buffer)
1267 sbus_writew(mode, &ib->mode);
1268 else
1269 ib->mode = mode;
1270 } else {
1271 mode &= ~LE_MO_PROM;
1272 if (lp->pio_buffer)
1273 sbus_writew(mode, &ib->mode);
1274 else
1275 ib->mode = mode;
1276 lance_load_multicast(dev);
1277 }
1278 load_csrs(lp);
1279 init_restart_lance(lp);
1280 netif_wake_queue(dev);
1281 }
1282
1283 static void lance_set_multicast_retry(unsigned long _opaque)
1284 {
1285 struct net_device *dev = (struct net_device *) _opaque;
1286
1287 lance_set_multicast(dev);
1288 }
1289
1290 static void lance_free_hwresources(struct lance_private *lp)
1291 {
1292 if (lp->lregs)
1293 sbus_iounmap(lp->lregs, LANCE_REG_SIZE);
1294 if (lp->init_block != NULL) {
1295 if (lp->pio_buffer) {
1296 sbus_iounmap((unsigned long)lp->init_block,
1297 sizeof(struct lance_init_block));
1298 } else {
1299 sbus_free_consistent(lp->sdev,
1300 sizeof(struct lance_init_block),
1301 (void *)lp->init_block,
1302 lp->init_block_dvma);
1303 }
1304 }
1305 }
1306
1307 static int __init sparc_lance_init(struct net_device *dev,
1308 struct sbus_dev *sdev,
1309 struct sbus_dma *ledma,
1310 struct sbus_dev *lebuffer)
1311 {
1312 static unsigned version_printed = 0;
1313 struct lance_private *lp = NULL;
1314 int i;
1315
1316 if (dev == NULL) {
1317 dev = init_etherdev (0, sizeof (struct lance_private) + 8);
1318 } else {
1319 dev->priv = kmalloc(sizeof (struct lance_private) + 8,
1320 GFP_KERNEL);
1321 if (dev->priv == NULL)
1322 return -ENOMEM;
1323 memset(dev->priv, 0, sizeof (struct lance_private) + 8);
1324 }
1325 if (sparc_lance_debug && version_printed++ == 0)
1326 printk (KERN_INFO "%s", version);
1327
1328 printk(KERN_INFO "%s: LANCE ", dev->name);
1329
1330 /* Make certain the data structures used by the LANCE are aligned. */
1331 dev->priv = (void *)(((unsigned long)dev->priv + 7) & ~7);
1332 lp = (struct lance_private *) dev->priv;
1333 spin_lock_init(&lp->lock);
1334
1335 /* Copy the IDPROM ethernet address to the device structure, later we
1336 * will copy the address in the device structure to the lance
1337 * initialization block.
1338 */
1339 for (i = 0; i < 6; i++)
1340 printk("%2.2x%c", dev->dev_addr[i] = idprom->id_ethaddr[i],
1341 i == 5 ? ' ': ':');
1342 printk("\n");
1343
1344 /* Get the IO region */
1345 lp->lregs = sbus_ioremap(&sdev->resource[0], 0,
1346 LANCE_REG_SIZE, lancestr);
1347 if (lp->lregs == 0UL) {
1348 printk(KERN_ERR "%s: Cannot map SunLance registers.\n",
1349 dev->name);
1350 goto fail;
1351 }
1352
1353 lp->sdev = sdev;
1354 if (lebuffer) {
1355 lp->init_block = (volatile struct lance_init_block *)
1356 sbus_ioremap(&lebuffer->resource[0], 0,
1357 sizeof(struct lance_init_block), "lebuffer");
1358 if (lp->init_block == NULL) {
1359 printk(KERN_ERR "%s: Cannot map SunLance PIO buffer.\n",
1360 dev->name);
1361 goto fail;
1362 }
1363 lp->init_block_dvma = 0;
1364 lp->pio_buffer = 1;
1365 lp->init_ring = lance_init_ring_pio;
1366 lp->rx = lance_rx_pio;
1367 lp->tx = lance_tx_pio;
1368 } else {
1369 lp->init_block = (volatile struct lance_init_block *)
1370 sbus_alloc_consistent(sdev, sizeof(struct lance_init_block),
1371 &lp->init_block_dvma);
1372 if (lp->init_block == NULL ||
1373 lp->init_block_dvma == 0) {
1374 printk(KERN_ERR "%s: Cannot allocate consistent DMA memory.\n",
1375 dev->name);
1376 goto fail;
1377 }
1378 lp->pio_buffer = 0;
1379 lp->init_ring = lance_init_ring_dvma;
1380 lp->rx = lance_rx_dvma;
1381 lp->tx = lance_tx_dvma;
1382 }
1383 lp->busmaster_regval = prom_getintdefault(sdev->prom_node,
1384 "busmaster-regval",
1385 (LE_C3_BSWP | LE_C3_ACON |
1386 LE_C3_BCON));
1387
1388 lp->name = lancestr;
1389 lp->ledma = ledma;
1390
1391 lp->burst_sizes = 0;
1392 if (lp->ledma) {
1393 char prop[6];
1394 unsigned int sbmask;
1395 u32 csr;
1396
1397 /* Find burst-size property for ledma */
1398 lp->burst_sizes = prom_getintdefault(ledma->sdev->prom_node,
1399 "burst-sizes", 0);
1400
1401 /* ledma may be capable of fast bursts, but sbus may not. */
1402 sbmask = prom_getintdefault(ledma->sdev->bus->prom_node,
1403 "burst-sizes", DMA_BURSTBITS);
1404 lp->burst_sizes &= sbmask;
1405
1406 /* Get the cable-selection property */
1407 memset(prop, 0, sizeof(prop));
1408 prom_getstring(ledma->sdev->prom_node, "cable-selection",
1409 prop, sizeof(prop));
1410 if (prop[0] == 0) {
1411 int topnd, nd;
1412
1413 printk(KERN_INFO "%s: using auto-carrier-detection.\n",
1414 dev->name);
1415
1416 /* Is this found at /options .attributes in all
1417 * Prom versions? XXX
1418 */
1419 topnd = prom_getchild(prom_root_node);
1420
1421 nd = prom_searchsiblings(topnd, "options");
1422 if (!nd)
1423 goto no_link_test;
1424
1425 if (!prom_node_has_property(nd, "tpe-link-test?"))
1426 goto no_link_test;
1427
1428 memset(prop, 0, sizeof(prop));
1429 prom_getstring(nd, "tpe-link-test?", prop,
1430 sizeof(prop));
1431
1432 if (strcmp(prop, "true")) {
1433 printk(KERN_NOTICE "%s: warning: overriding option "
1434 "'tpe-link-test?'\n", dev->name);
1435 printk(KERN_NOTICE "%s: warning: mail any problems "
1436 "to ecd@skynet.be\n", dev->name);
1437 set_auxio(AUXIO_LINK_TEST, 0);
1438 }
1439 no_link_test:
1440 lp->auto_select = 1;
1441 lp->tpe = 0;
1442 } else if (!strcmp(prop, "aui")) {
1443 lp->auto_select = 0;
1444 lp->tpe = 0;
1445 } else {
1446 lp->auto_select = 0;
1447 lp->tpe = 1;
1448 }
1449
1450 lp->dregs = ledma->regs;
1451
1452 /* Reset ledma */
1453 csr = sbus_readl(lp->dregs + DMA_CSR);
1454 sbus_writel(csr | DMA_RST_ENET, lp->dregs + DMA_CSR);
1455 udelay(200);
1456 sbus_writel(csr & ~DMA_RST_ENET, lp->dregs + DMA_CSR);
1457 } else
1458 lp->dregs = 0;
1459
1460 /* This should never happen. */
1461 if ((unsigned long)(lp->init_block->brx_ring) & 0x07) {
1462 printk(KERN_ERR "%s: ERROR: Rx and Tx rings not on even boundary.\n",
1463 dev->name);
1464 goto fail;
1465 }
1466
1467 lp->dev = dev;
1468 dev->open = &lance_open;
1469 dev->stop = &lance_close;
1470 dev->hard_start_xmit = &lance_start_xmit;
1471 dev->tx_timeout = &lance_tx_timeout;
1472 dev->watchdog_timeo = 5*HZ;
1473 dev->get_stats = &lance_get_stats;
1474 dev->set_multicast_list = &lance_set_multicast;
1475
1476 dev->irq = sdev->irqs[0];
1477
1478 dev->dma = 0;
1479 ether_setup(dev);
1480
1481 /* We cannot sleep if the chip is busy during a
1482 * multicast list update event, because such events
1483 * can occur from interrupts (ex. IPv6). So we
1484 * use a timer to try again later when necessary. -DaveM
1485 */
1486 init_timer(&lp->multicast_timer);
1487 lp->multicast_timer.data = (unsigned long) dev;
1488 lp->multicast_timer.function = &lance_set_multicast_retry;
1489
1490 dev->ifindex = dev_new_index();
1491 lp->next_module = root_lance_dev;
1492 root_lance_dev = lp;
1493
1494 return 0;
1495
1496 fail:
1497 if (lp != NULL)
1498 lance_free_hwresources(lp);
1499 return -ENODEV;
1500 }
1501
1502 /* On 4m, find the associated dma for the lance chip */
1503 static inline struct sbus_dma *find_ledma(struct sbus_dev *sdev)
1504 {
1505 struct sbus_dma *p;
1506
1507 for_each_dvma(p) {
1508 if (p->sdev == sdev)
1509 return p;
1510 }
1511 return NULL;
1512 }
1513
1514 #ifdef CONFIG_SUN4
1515
1516 #include <asm/sun4paddr.h>
1517
1518 /* Find all the lance cards on the system and initialize them */
1519 static int __init sparc_lance_probe(void)
1520 {
1521 static struct sbus_dev sdev;
1522 static int called = 0;
1523
1524 root_lance_dev = NULL;
1525
1526 if (called)
1527 return -ENODEV;
1528 called++;
1529
1530 if ((idprom->id_machtype == (SM_SUN4|SM_4_330)) ||
1531 (idprom->id_machtype == (SM_SUN4|SM_4_470))) {
1532 memset(&sdev, 0, sizeof(sdev));
1533 sdev.reg_addrs[0].phys_addr = sun4_eth_physaddr;
1534 sdev.irqs[0] = 6;
1535 return sparc_lance_init(NULL, &sdev, 0, 0);
1536 }
1537 return -ENODEV;
1538 }
1539
1540 #else /* !CONFIG_SUN4 */
1541
1542 /* Find all the lance cards on the system and initialize them */
1543 static int __init sparc_lance_probe(void)
1544 {
1545 struct sbus_bus *bus;
1546 struct sbus_dev *sdev = 0;
1547 struct net_device *dev = NULL;
1548 struct sbus_dma *ledma = 0;
1549 static int called = 0;
1550 int cards = 0, v;
1551
1552 root_lance_dev = NULL;
1553
1554 if (called)
1555 return -ENODEV;
1556 called++;
1557
1558 for_each_sbus (bus) {
1559 for_each_sbusdev (sdev, bus) {
1560 if (cards)
1561 dev = NULL;
1562 if (strcmp(sdev->prom_name, "le") == 0) {
1563 cards++;
1564 if ((v = sparc_lance_init(dev, sdev, 0, 0)))
1565 return v;
1566 continue;
1567 }
1568 if (strcmp(sdev->prom_name, "ledma") == 0) {
1569 cards++;
1570 ledma = find_ledma(sdev);
1571 if ((v = sparc_lance_init(dev, sdev->child,
1572 ledma, 0)))
1573 return v;
1574 continue;
1575 }
1576 if (strcmp(sdev->prom_name, "lebuffer") == 0){
1577 cards++;
1578 if ((v = sparc_lance_init(dev, sdev->child,
1579 0, sdev)))
1580 return v;
1581 continue;
1582 }
1583 } /* for each sbusdev */
1584 } /* for each sbus */
1585 if (!cards)
1586 return -ENODEV;
1587 return 0;
1588 }
1589 #endif /* !CONFIG_SUN4 */
1590
1591 static void __exit sparc_lance_cleanup(void)
1592 {
1593 struct lance_private *lp;
1594
1595 while (root_lance_dev) {
1596 lp = root_lance_dev->next_module;
1597
1598 unregister_netdev(root_lance_dev->dev);
1599 lance_free_hwresources(root_lance_dev);
1600 kfree(root_lance_dev->dev);
1601 root_lance_dev = lp;
1602 }
1603 }
1604
1605 module_init(sparc_lance_probe);
1606 module_exit(sparc_lance_cleanup);
1607
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