1 /*
2 * DTC controller, taken from T128 driver by...
3 * Copyright 1993, Drew Eckhardt
4 * Visionary Computing
5 * (Unix and Linux consulting and custom programming)
6 * drew@colorado.edu
7 * +1 (303) 440-4894
8 *
9 * DISTRIBUTION RELEASE 2.
10 *
11 * For more information, please consult
12 *
13 *
14 *
15 * and
16 *
17 * NCR 5380 Family
18 * SCSI Protocol Controller
19 * Databook
20 *
21 * NCR Microelectronics
22 * 1635 Aeroplaza Drive
23 * Colorado Springs, CO 80916
24 * 1+ (719) 578-3400
25 * 1+ (800) 334-5454
26 */
27
28 #ifndef DTC3280_H
29 #define DTC3280_H
30
31 #ifndef ASM
32 int dtc_abort(Scsi_Cmnd *);
33 int dtc_biosparam(Disk *, kdev_t, int*);
34 int dtc_detect(Scsi_Host_Template *);
35 int dtc_queue_command(Scsi_Cmnd *, void (*done)(Scsi_Cmnd *));
36 int dtc_reset(Scsi_Cmnd *, unsigned int reset_flags);
37 int dtc_proc_info (char *buffer, char **start, off_t offset,
38 int length, int hostno, int inout);
39
40 #ifndef NULL
41 #define NULL 0
42 #endif
43
44 #ifndef CMD_PER_LUN
45 #define CMD_PER_LUN 2
46 #endif
47
48 #ifndef CAN_QUEUE
49 #define CAN_QUEUE 32
50 #endif
51
52 /*
53 * I hadn't thought of this with the earlier drivers - but to prevent
54 * macro definition conflicts, we shouldn't define all of the internal
55 * macros when this is being used solely for the host stub.
56 */
57
58 #define DTC3x80 { \
59 name: "DTC 3180/3280 ", \
60 detect: dtc_detect, \
61 queuecommand: dtc_queue_command, \
62 abort: dtc_abort, \
63 reset: dtc_reset, \
64 bios_param: dtc_biosparam, \
65 can_queue: CAN_QUEUE, \
66 this_id: 7, \
67 sg_tablesize: SG_ALL, \
68 cmd_per_lun: CMD_PER_LUN , \
69 use_clustering: DISABLE_CLUSTERING}
70
71 #define NCR5380_implementation_fields \
72 volatile unsigned int base
73
74 #define NCR5380_local_declare() \
75 volatile unsigned int base
76
77 #define NCR5380_setup(instance) \
78 base = (unsigned int)(instance)->base
79
80 #define DTC_address(reg) (base + DTC_5380_OFFSET + reg)
81
82 #define dbNCR5380_read(reg) \
83 (rval=readb(DTC_address(reg)), \
84 (((unsigned char) printk("DTC : read register %d at addr %08x is: %02x\n"\
85 , (reg), (int)DTC_address(reg), rval)), rval ) )
86
87 #define dbNCR5380_write(reg, value) do { \
88 printk("DTC : write %02x to register %d at address %08x\n", \
89 (value), (reg), (int)DTC_address(reg)); \
90 writeb(value, DTC_address(reg));} while(0)
91
92
93 #if !(DTCDEBUG & DTCDEBUG_TRANSFER)
94 #define NCR5380_read(reg) (readb(DTC_address(reg)))
95 #define NCR5380_write(reg, value) (writeb(value, DTC_address(reg)))
96 #else
97 #define NCR5380_read(reg) (readb(DTC_address(reg)))
98 #define xNCR5380_read(reg) \
99 (((unsigned char) printk("DTC : read register %d at address %08x\n"\
100 , (reg), DTC_address(reg))), readb(DTC_address(reg)))
101
102 #define NCR5380_write(reg, value) do { \
103 printk("DTC : write %02x to register %d at address %08x\n", \
104 (value), (reg), (int)DTC_address(reg)); \
105 writeb(value, DTC_address(reg));} while(0)
106 #endif
107
108 #define NCR5380_intr dtc_intr
109 #define do_NCR5380_intr do_dtc_intr
110 #define NCR5380_queue_command dtc_queue_command
111 #define NCR5380_abort dtc_abort
112 #define NCR5380_reset dtc_reset
113 #define NCR5380_proc_info dtc_proc_info
114
115 /* 15 12 11 10
116 1001 1100 0000 0000 */
117
118 #define DTC_IRQS 0x9c00
119
120
121 #endif /* ndef ASM */
122 #endif /* DTC3280_H */
123
This page was automatically generated by the
LXR engine.
Visit the LXR main site for more
information.