1 /*
2 * Intel i810 and friends ICH driver for Linux
3 * Alan Cox <alan@redhat.com>
4 *
5 * Built from:
6 * Low level code: Zach Brown (original nonworking i810 OSS driver)
7 * Jaroslav Kysela <perex@suse.cz> (working ALSA driver)
8 *
9 * Framework: Thomas Sailer <sailer@ife.ee.ethz.ch>
10 * Extended by: Zach Brown <zab@redhat.com>
11 * and others..
12 *
13 * Hardware Provided By:
14 * Analog Devices (A major AC97 codec maker)
15 * Intel Corp (you've probably heard of them already)
16 *
17 * AC97 clues and assistance provided by
18 * Analog Devices
19 * Zach 'Fufu' Brown
20 * Jeff Garzik
21 *
22 * This program is free software; you can redistribute it and/or modify
23 * it under the terms of the GNU General Public License as published by
24 * the Free Software Foundation; either version 2 of the License, or
25 * (at your option) any later version.
26 *
27 * This program is distributed in the hope that it will be useful,
28 * but WITHOUT ANY WARRANTY; without even the implied warranty of
29 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
30 * GNU General Public License for more details.
31 *
32 * You should have received a copy of the GNU General Public License
33 * along with this program; if not, write to the Free Software
34 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
35 *
36 *
37 * Intel 810 theory of operation
38 *
39 * The chipset provides three DMA channels that talk to an AC97
40 * CODEC (AC97 is a digital/analog mixer standard). At its simplest
41 * you get 48Khz audio with basic volume and mixer controls. At the
42 * best you get rate adaption in the codec. We set the card up so
43 * that we never take completion interrupts but instead keep the card
44 * chasing its tail around a ring buffer. This is needed for mmap
45 * mode audio and happens to work rather well for non-mmap modes too.
46 *
47 * The board has one output channel for PCM audio (supported) and
48 * a stereo line in and mono microphone input. Again these are normally
49 * locked to 48Khz only. Right now recording is not finished.
50 *
51 * There is no midi support, no synth support. Use timidity. To get
52 * esd working you need to use esd -r 48000 as it won't probe 48KHz
53 * by default. mpg123 can't handle 48Khz only audio so use xmms.
54 *
55 * Fix The Sound On Dell
56 *
57 * Not everyone uses 48KHz. We know of no way to detect this reliably
58 * and certainly not to get the right data. If your i810 audio sounds
59 * stupid you may need to investigate other speeds. According to Analog
60 * they tend to use a 14.318MHz clock which gives you a base rate of
61 * 41194Hz.
62 *
63 * This is available via the 'ftsodell=1' option.
64 *
65 * If you need to force a specific rate set the clocking= option
66 */
67
68 #include <linux/module.h>
69 #include <linux/version.h>
70 #include <linux/string.h>
71 #include <linux/ctype.h>
72 #include <linux/ioport.h>
73 #include <linux/sched.h>
74 #include <linux/delay.h>
75 #include <linux/sound.h>
76 #include <linux/malloc.h>
77 #include <linux/soundcard.h>
78 #include <linux/pci.h>
79 #include <asm/io.h>
80 #include <asm/dma.h>
81 #include <linux/init.h>
82 #include <linux/poll.h>
83 #include <linux/spinlock.h>
84 #include <linux/smp_lock.h>
85 #include <linux/ac97_codec.h>
86 #include <linux/wrapper.h>
87 #include <asm/uaccess.h>
88 #include <asm/hardirq.h>
89
90 #ifndef PCI_DEVICE_ID_INTEL_82801
91 #define PCI_DEVICE_ID_INTEL_82801 0x2415
92 #endif
93 #ifndef PCI_DEVICE_ID_INTEL_82901
94 #define PCI_DEVICE_ID_INTEL_82901 0x2425
95 #endif
96 #ifndef PCI_DEVICE_ID_INTEL_ICH2
97 #define PCI_DEVICE_ID_INTEL_ICH2 0x2445
98 #endif
99 #ifndef PCI_DEVICE_ID_INTEL_440MX
100 #define PCI_DEVICE_ID_INTEL_440MX 0x7195
101 #endif
102
103 static int ftsodell=0;
104 static unsigned int clocking=48000;
105
106
107 #define ADC_RUNNING 1
108 #define DAC_RUNNING 2
109
110 #define I810_FMT_16BIT 1
111 #define I810_FMT_STEREO 2
112 #define I810_FMT_MASK 3
113
114 /* the 810's array of pointers to data buffers */
115
116 struct sg_item {
117 #define BUSADDR_MASK 0xFFFFFFFE
118 u32 busaddr;
119 #define CON_IOC 0x80000000 /* interrupt on completion */
120 #define CON_BUFPAD 0x40000000 /* pad underrun with last sample, else 0 */
121 #define CON_BUFLEN_MASK 0x0000ffff /* buffer length in samples */
122 u32 control;
123 };
124
125 /* an instance of the i810 channel */
126 #define SG_LEN 32
127 struct i810_channel
128 {
129 /* these sg guys should probably be allocated
130 seperately as nocache. Must be 8 byte aligned */
131 struct sg_item sg[SG_LEN]; /* 32*8 */
132 u32 offset; /* 4 */
133 u32 port; /* 4 */
134 u32 used;
135 u32 num;
136 };
137
138 /*
139 * we have 3 seperate dma engines. pcm in, pcm out, and mic.
140 * each dma engine has controlling registers. These goofy
141 * names are from the datasheet, but make it easy to write
142 * code while leafing through it.
143 */
144
145 #define ENUM_ENGINE(PRE,DIG) \
146 enum { \
147 PRE##_BDBAR = 0x##DIG##0, /* Buffer Descriptor list Base Address */ \
148 PRE##_CIV = 0x##DIG##4, /* Current Index Value */ \
149 PRE##_LVI = 0x##DIG##5, /* Last Valid Index */ \
150 PRE##_SR = 0x##DIG##6, /* Status Register */ \
151 PRE##_PICB = 0x##DIG##8, /* Position In Current Buffer */ \
152 PRE##_PIV = 0x##DIG##a, /* Prefetched Index Value */ \
153 PRE##_CR = 0x##DIG##b /* Control Register */ \
154 }
155
156 ENUM_ENGINE(OFF,0); /* Offsets */
157 ENUM_ENGINE(PI,0); /* PCM In */
158 ENUM_ENGINE(PO,1); /* PCM Out */
159 ENUM_ENGINE(MC,2); /* Mic In */
160
161 enum {
162 GLOB_CNT = 0x2c, /* Global Control */
163 GLOB_STA = 0x30, /* Global Status */
164 CAS = 0x34 /* Codec Write Semaphore Register */
165 };
166
167 /* interrupts for a dma engine */
168 #define DMA_INT_FIFO (1<<4) /* fifo under/over flow */
169 #define DMA_INT_COMPLETE (1<<3) /* buffer read/write complete and ioc set */
170 #define DMA_INT_LVI (1<<2) /* last valid done */
171 #define DMA_INT_CELV (1<<1) /* last valid is current */
172 #define DMA_INT_MASK (DMA_INT_FIFO|DMA_INT_COMPLETE|DMA_INT_LVI)
173
174 /* interrupts for the whole chip */
175 #define INT_SEC (1<<11)
176 #define INT_PRI (1<<10)
177 #define INT_MC (1<<7)
178 #define INT_PO (1<<6)
179 #define INT_PI (1<<5)
180 #define INT_MO (1<<2)
181 #define INT_NI (1<<1)
182 #define INT_GPI (1<<0)
183 #define INT_MASK (INT_SEC|INT_PRI|INT_MC|INT_PO|INT_PI|INT_MO|INT_NI|INT_GPI)
184
185
186 #define DRIVER_VERSION "0.01"
187
188 /* magic numbers to protect our data structures */
189 #define I810_CARD_MAGIC 0x5072696E /* "Prin" */
190 #define I810_STATE_MAGIC 0x63657373 /* "cess" */
191 #define I810_DMA_MASK 0xffffffff /* DMA buffer mask for pci_alloc_consist */
192 #define NR_HW_CH 3
193
194 /* maxinum number of AC97 codecs connected, AC97 2.0 defined 4 */
195 #define NR_AC97 2
196
197 static const unsigned sample_size[] = { 1, 2, 2, 4 };
198 static const unsigned sample_shift[] = { 0, 1, 1, 2 };
199
200 enum {
201 ICH82801AA = 0,
202 ICH82901AB,
203 INTEL440MX,
204 INTELICH2,
205 };
206
207 static char * card_names[] = {
208 "Intel ICH 82801AA",
209 "Intel ICH 82901AB",
210 "Intel 440MX",
211 "Intel ICH2"
212 };
213
214 static struct pci_device_id i810_pci_tbl [] __initdata = {
215 {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801,
216 PCI_ANY_ID, PCI_ANY_ID, 0, 0, ICH82801AA},
217 {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82901,
218 PCI_ANY_ID, PCI_ANY_ID, 0, 0, ICH82901AB},
219 {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_440MX,
220 PCI_ANY_ID, PCI_ANY_ID, 0, 0, INTEL440MX},
221 {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH2,
222 PCI_ANY_ID, PCI_ANY_ID, 0, 0, INTELICH2},
223 {0,}
224 };
225
226 MODULE_DEVICE_TABLE (pci, i810_pci_tbl);
227
228 /* "software" or virtual channel, an instance of opened /dev/dsp */
229 struct i810_state {
230 unsigned int magic;
231 struct i810_card *card; /* Card info */
232
233 /* single open lock mechanism, only used for recording */
234 struct semaphore open_sem;
235 wait_queue_head_t open_wait;
236
237 /* file mode */
238 mode_t open_mode;
239
240 /* virtual channel number */
241 int virt;
242
243 struct dmabuf {
244 /* wave sample stuff */
245 unsigned int rate;
246 unsigned char fmt, enable;
247
248 /* hardware channel */
249 struct i810_channel *channel;
250
251 /* OSS buffer management stuff */
252 void *rawbuf;
253 dma_addr_t dma_handle;
254 unsigned buforder;
255 unsigned numfrag;
256 unsigned fragshift;
257
258 /* our buffer acts like a circular ring */
259 unsigned hwptr; /* where dma last started, updated by update_ptr */
260 unsigned swptr; /* where driver last clear/filled, updated by read/write */
261 int count; /* bytes to be comsumed or been generated by dma machine */
262 unsigned total_bytes; /* total bytes dmaed by hardware */
263
264 unsigned error; /* number of over/underruns */
265 wait_queue_head_t wait; /* put process on wait queue when no more space in buffer */
266
267 /* redundant, but makes calculations easier */
268 unsigned fragsize;
269 unsigned dmasize;
270 unsigned fragsamples;
271
272 /* OSS stuff */
273 unsigned mapped:1;
274 unsigned ready:1;
275 unsigned endcleared:1;
276 unsigned update_flag;
277 unsigned ossfragshift;
278 int ossmaxfrags;
279 unsigned subdivision;
280 } dmabuf;
281 };
282
283
284 struct i810_card {
285 struct i810_channel channel[3];
286 unsigned int magic;
287
288 /* We keep i810 cards in a linked list */
289 struct i810_card *next;
290
291 /* The i810 has a certain amount of cross channel interaction
292 so we use a single per card lock */
293 spinlock_t lock;
294
295 /* PCI device stuff */
296 struct pci_dev * pci_dev;
297 u16 pci_id;
298
299 /* soundcore stuff */
300 int dev_audio;
301
302 /* structures for abstraction of hardware facilities, codecs, banks and channels*/
303 struct ac97_codec *ac97_codec[NR_AC97];
304 struct i810_state *states[NR_HW_CH];
305
306 u16 ac97_features;
307
308 /* hardware resources */
309 unsigned long iobase;
310 unsigned long ac97base;
311 u32 irq;
312
313 /* Function support */
314 struct i810_channel *(*alloc_pcm_channel)(struct i810_card *);
315 struct i810_channel *(*alloc_rec_pcm_channel)(struct i810_card *);
316 void (*free_pcm_channel)(struct i810_card *, int chan);
317 };
318
319 static struct i810_card *devs = NULL;
320
321 static int i810_open_mixdev(struct inode *inode, struct file *file);
322 static int i810_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd,
323 unsigned long arg);
324 static loff_t i810_llseek(struct file *file, loff_t offset, int origin);
325
326 extern __inline__ unsigned ld2(unsigned int x)
327 {
328 unsigned r = 0;
329
330 if (x >= 0x10000) {
331 x >>= 16;
332 r += 16;
333 }
334 if (x >= 0x100) {
335 x >>= 8;
336 r += 8;
337 }
338 if (x >= 0x10) {
339 x >>= 4;
340 r += 4;
341 }
342 if (x >= 4) {
343 x >>= 2;
344 r += 2;
345 }
346 if (x >= 2)
347 r++;
348 return r;
349 }
350
351 static u16 i810_ac97_get(struct ac97_codec *dev, u8 reg);
352 static void i810_ac97_set(struct ac97_codec *dev, u8 reg, u16 data);
353
354 static struct i810_channel *i810_alloc_pcm_channel(struct i810_card *card)
355 {
356 if(card->channel[1].used==1)
357 return NULL;
358 card->channel[1].used=1;
359 card->channel[1].offset = 0;
360 card->channel[1].port = 0x10;
361 card->channel[1].num=1;
362 return &card->channel[1];
363 }
364
365 static struct i810_channel *i810_alloc_rec_pcm_channel(struct i810_card *card)
366 {
367 if(card->channel[0].used==1)
368 return NULL;
369 card->channel[0].used=1;
370 card->channel[0].offset = 0;
371 card->channel[0].port = 0x00;
372 card->channel[1].num=0;
373 return &card->channel[0];
374 }
375
376 static void i810_free_pcm_channel(struct i810_card *card, int channel)
377 {
378 card->channel[channel].used=0;
379 }
380
381 /* set playback sample rate */
382 static unsigned int i810_set_dac_rate(struct i810_state * state, unsigned int rate)
383 {
384 struct dmabuf *dmabuf = &state->dmabuf;
385 u32 dacp;
386 struct ac97_codec *codec=state->card->ac97_codec[0];
387
388 if(!(state->card->ac97_features&0x0001))
389 {
390 dmabuf->rate = clocking;
391 return clocking;
392 }
393
394 if (rate > 48000)
395 rate = 48000;
396 if (rate < 8000)
397 rate = 8000;
398
399 /*
400 * Adjust for misclocked crap
401 */
402
403 rate = ( rate * clocking)/48000;
404
405 /* Analog codecs can go lower via magic registers but others
406 might not */
407
408 if(rate < 8000)
409 rate = 8000;
410
411 if(rate != i810_ac97_get(codec, AC97_PCM_FRONT_DAC_RATE))
412 {
413 /* Power down the DAC */
414 dacp=i810_ac97_get(codec, AC97_POWER_CONTROL);
415 i810_ac97_set(codec, AC97_POWER_CONTROL, dacp|0x0200);
416 /* Load the rate and read the effective rate */
417 i810_ac97_set(codec, AC97_PCM_FRONT_DAC_RATE, rate);
418 rate=i810_ac97_get(codec, AC97_PCM_FRONT_DAC_RATE);
419 /* Power it back up */
420 i810_ac97_set(codec, AC97_POWER_CONTROL, dacp);
421 }
422 rate=(rate * 48000) / clocking;
423 dmabuf->rate = rate;
424 #ifdef DEBUG
425 printk("i810_audio: called i810_set_dac_rate : rate = %d\n", rate);
426 #endif
427
428 return rate;
429 }
430
431 /* set recording sample rate */
432 static unsigned int i810_set_adc_rate(struct i810_state * state, unsigned int rate)
433 {
434 struct dmabuf *dmabuf = &state->dmabuf;
435 u32 dacp;
436 struct ac97_codec *codec=state->card->ac97_codec[0];
437
438 if(!(state->card->ac97_features&0x0001))
439 {
440 dmabuf->rate = clocking;
441 return clocking;
442 }
443
444 if (rate > 48000)
445 rate = 48000;
446 if (rate < 8000)
447 rate = 8000;
448
449 /*
450 * Adjust for misclocked crap
451 */
452
453 rate = ( rate * clocking)/48000;
454
455 /* Analog codecs can go lower via magic registers but others
456 might not */
457
458 if(rate < 8000)
459 rate = 8000;
460
461 if(rate != i810_ac97_get(codec, AC97_PCM_LR_DAC_RATE))
462 {
463 /* Power down the ADC */
464 dacp=i810_ac97_get(codec, AC97_POWER_CONTROL);
465 i810_ac97_set(codec, AC97_POWER_CONTROL, dacp|0x0100);
466 /* Load the rate and read the effective rate */
467 i810_ac97_set(codec, AC97_PCM_LR_DAC_RATE, rate);
468 rate=i810_ac97_get(codec, AC97_PCM_LR_DAC_RATE);
469 /* Power it back up */
470 i810_ac97_set(codec, AC97_POWER_CONTROL, dacp);
471 }
472 rate = (rate * 48000) / clocking;
473 dmabuf->rate = rate;
474 #ifdef DEBUG
475 printk("i810_audio: called i810_set_adc_rate : rate = %d\n", rate);
476 #endif
477 return rate;
478 }
479
480 /* prepare channel attributes for playback */
481 static void i810_play_setup(struct i810_state *state)
482 {
483 // struct dmabuf *dmabuf = &state->dmabuf;
484 // struct i810_channel *channel = dmabuf->channel;
485 /* Fixed format. .. */
486 //if (dmabuf->fmt & I810_FMT_16BIT)
487 //if (dmabuf->fmt & I810_FMT_STEREO)
488 }
489
490 /* prepare channel attributes for recording */
491 static void i810_rec_setup(struct i810_state *state)
492 {
493 // u16 w;
494 // struct i810_card *card = state->card;
495 // struct dmabuf *dmabuf = &state->dmabuf;
496 // struct i810_channel *channel = dmabuf->channel;
497
498 /* Enable AC-97 ADC (capture) */
499 // if (dmabuf->fmt & I810_FMT_16BIT) {
500 // if (dmabuf->fmt & I810_FMT_STEREO)
501 }
502
503
504 /* get current playback/recording dma buffer pointer (byte offset from LBA),
505 called with spinlock held! */
506
507 extern __inline__ unsigned i810_get_dma_addr(struct i810_state *state)
508 {
509 struct dmabuf *dmabuf = &state->dmabuf;
510 unsigned int civ, offset;
511 struct i810_channel *c = dmabuf->channel;
512
513 if (!dmabuf->enable)
514 return 0;
515 do {
516 civ = inb(state->card->iobase+c->port+OFF_CIV);
517 offset = (civ + 1) * (dmabuf->dmasize/SG_LEN) -
518 2 * inw(state->card->iobase+c->port+OFF_PICB);
519 /* CIV changed before we read PICB (very seldom) ?
520 * then PICB was rubbish, so try again */
521 } while (civ != inb(state->card->iobase+c->port+OFF_CIV));
522
523 return offset;
524 }
525
526 static void resync_dma_ptrs(struct i810_state *state)
527 {
528 struct dmabuf *dmabuf = &state->dmabuf;
529 struct i810_channel *c = dmabuf->channel;
530 int offset;
531
532 offset = inb(state->card->iobase+c->port+OFF_CIV);
533 offset *= (dmabuf->dmasize/SG_LEN);
534
535 dmabuf->hwptr=dmabuf->swptr = offset;
536 }
537
538 /* Stop recording (lock held) */
539 extern __inline__ void __stop_adc(struct i810_state *state)
540 {
541 struct dmabuf *dmabuf = &state->dmabuf;
542 struct i810_card *card = state->card;
543
544 dmabuf->enable &= ~ADC_RUNNING;
545 outb(0, card->iobase + PI_CR);
546 }
547
548 static void stop_adc(struct i810_state *state)
549 {
550 struct i810_card *card = state->card;
551 unsigned long flags;
552
553 spin_lock_irqsave(&card->lock, flags);
554 __stop_adc(state);
555 spin_unlock_irqrestore(&card->lock, flags);
556 }
557
558 static void start_adc(struct i810_state *state)
559 {
560 struct dmabuf *dmabuf = &state->dmabuf;
561 struct i810_card *card = state->card;
562 unsigned long flags;
563
564 spin_lock_irqsave(&card->lock, flags);
565 if ((dmabuf->mapped || dmabuf->count < (signed)dmabuf->dmasize) && dmabuf->ready) {
566 dmabuf->enable |= ADC_RUNNING;
567 outb((1<<4) | 1<<2 | 1, card->iobase + PI_CR);
568 }
569 spin_unlock_irqrestore(&card->lock, flags);
570 }
571
572 /* stop playback (lock held) */
573 extern __inline__ void __stop_dac(struct i810_state *state)
574 {
575 struct dmabuf *dmabuf = &state->dmabuf;
576 struct i810_card *card = state->card;
577
578 dmabuf->enable &= ~DAC_RUNNING;
579 outb(0, card->iobase + PO_CR);
580 }
581
582 static void stop_dac(struct i810_state *state)
583 {
584 struct i810_card *card = state->card;
585 unsigned long flags;
586
587 spin_lock_irqsave(&card->lock, flags);
588 __stop_dac(state);
589 spin_unlock_irqrestore(&card->lock, flags);
590 }
591
592 static void start_dac(struct i810_state *state)
593 {
594 struct dmabuf *dmabuf = &state->dmabuf;
595 struct i810_card *card = state->card;
596 unsigned long flags;
597
598 spin_lock_irqsave(&card->lock, flags);
599 if ((dmabuf->mapped || dmabuf->count > 0) && dmabuf->ready) {
600 if(!(dmabuf->enable&DAC_RUNNING))
601 {
602 dmabuf->enable |= DAC_RUNNING;
603 outb((1<<4) | 1<<2 | 1, card->iobase + PO_CR);
604 }
605 }
606 spin_unlock_irqrestore(&card->lock, flags);
607 }
608
609 #define DMABUF_DEFAULTORDER (15-PAGE_SHIFT)
610 #define DMABUF_MINORDER 1
611
612 /* allocate DMA buffer, playback and recording buffer should be allocated seperately */
613 static int alloc_dmabuf(struct i810_state *state)
614 {
615 struct dmabuf *dmabuf = &state->dmabuf;
616 void *rawbuf;
617 int order;
618 struct page *page, *pend;
619
620 /* alloc as big a chunk as we can, FIXME: is this necessary ?? */
621 for (order = DMABUF_DEFAULTORDER; order >= DMABUF_MINORDER; order--)
622 if ((rawbuf = pci_alloc_consistent(state->card->pci_dev,
623 PAGE_SIZE << order,
624 &dmabuf->dma_handle)))
625 break;
626 if (!rawbuf)
627 return -ENOMEM;
628
629 #ifdef DEBUG
630 printk("i810_audio: allocated %ld (order = %d) bytes at %p\n",
631 PAGE_SIZE << order, order, rawbuf);
632 #endif
633
634 dmabuf->ready = dmabuf->mapped = 0;
635 dmabuf->rawbuf = rawbuf;
636 dmabuf->buforder = order;
637
638 /* now mark the pages as reserved; otherwise remap_page_range doesn't do what we want */
639 pend = virt_to_page(rawbuf + (PAGE_SIZE << order) - 1);
640 for (page = virt_to_page(rawbuf); page <= pend; page++)
641 mem_map_reserve(page);
642
643 return 0;
644 }
645
646 /* free DMA buffer */
647 static void dealloc_dmabuf(struct i810_state *state)
648 {
649 struct dmabuf *dmabuf = &state->dmabuf;
650 struct page *page, *pend;
651
652 if (dmabuf->rawbuf) {
653 /* undo marking the pages as reserved */
654 pend = virt_to_page(dmabuf->rawbuf + (PAGE_SIZE << dmabuf->buforder) - 1);
655 for (page = virt_to_page(dmabuf->rawbuf); page <= pend; page++)
656 mem_map_unreserve(page);
657 pci_free_consistent(state->card->pci_dev, PAGE_SIZE << dmabuf->buforder,
658 dmabuf->rawbuf, dmabuf->dma_handle);
659 }
660 dmabuf->rawbuf = NULL;
661 dmabuf->mapped = dmabuf->ready = 0;
662 }
663
664 static int prog_dmabuf(struct i810_state *state, unsigned rec)
665 {
666 struct dmabuf *dmabuf = &state->dmabuf;
667 struct sg_item *sg;
668 unsigned bytepersec;
669 unsigned bufsize;
670 unsigned long flags;
671 int ret;
672 unsigned fragsize;
673 int i;
674
675 spin_lock_irqsave(&state->card->lock, flags);
676 resync_dma_ptrs(state);
677 dmabuf->total_bytes = 0;
678 dmabuf->count = dmabuf->error = 0;
679 spin_unlock_irqrestore(&state->card->lock, flags);
680
681 /* allocate DMA buffer if not allocated yet */
682 if (!dmabuf->rawbuf)
683 if ((ret = alloc_dmabuf(state)))
684 return ret;
685
686 /* FIXME: figure out all this OSS fragment stuff */
687 bytepersec = dmabuf->rate << sample_shift[dmabuf->fmt];
688 bufsize = PAGE_SIZE << dmabuf->buforder;
689 if (dmabuf->ossfragshift) {
690 if ((1000 << dmabuf->ossfragshift) < bytepersec)
691 dmabuf->fragshift = ld2(bytepersec/1000);
692 else
693 dmabuf->fragshift = dmabuf->ossfragshift;
694 } else {
695 /* lets hand out reasonable big ass buffers by default */
696 dmabuf->fragshift = (dmabuf->buforder + PAGE_SHIFT -2);
697 }
698 dmabuf->numfrag = bufsize >> dmabuf->fragshift;
699 while (dmabuf->numfrag < 4 && dmabuf->fragshift > 3) {
700 dmabuf->fragshift--;
701 dmabuf->numfrag = bufsize >> dmabuf->fragshift;
702 }
703 dmabuf->fragsize = 1 << dmabuf->fragshift;
704 if (dmabuf->ossmaxfrags >= 4 && dmabuf->ossmaxfrags < dmabuf->numfrag)
705 dmabuf->numfrag = dmabuf->ossmaxfrags;
706 dmabuf->fragsamples = dmabuf->fragsize >> sample_shift[dmabuf->fmt];
707 dmabuf->dmasize = dmabuf->numfrag << dmabuf->fragshift;
708
709 memset(dmabuf->rawbuf, (dmabuf->fmt & I810_FMT_16BIT) ? 0 : 0x80,
710 dmabuf->dmasize);
711
712 /*
713 * Now set up the ring
714 */
715
716 sg=&dmabuf->channel->sg[0];
717 fragsize = bufsize / SG_LEN;
718
719 /*
720 * Load up 32 sg entries and take an interrupt at half
721 * way (we might want more interrupts later..)
722 */
723
724 for(i=0;i<32;i++)
725 {
726 sg->busaddr=virt_to_bus(dmabuf->rawbuf+fragsize*i);
727 sg->control=(fragsize>>1);
728 sg->control|=CON_IOC;
729 sg++;
730 }
731
732 spin_lock_irqsave(&state->card->lock, flags);
733 outb(2, state->card->iobase+dmabuf->channel->port+OFF_CR); /* reset DMA machine */
734 outl(virt_to_bus(&dmabuf->channel->sg[0]), state->card->iobase+dmabuf->channel->port+OFF_BDBAR);
735 outb(16, state->card->iobase+dmabuf->channel->port+OFF_LVI);
736 outb(0, state->card->iobase+dmabuf->channel->port+OFF_CIV);
737
738 if (rec) {
739 i810_rec_setup(state);
740 } else {
741 i810_play_setup(state);
742 }
743 spin_unlock_irqrestore(&state->card->lock, flags);
744
745 /* set the ready flag for the dma buffer */
746 dmabuf->ready = 1;
747
748 #ifdef DEBUG
749 printk("i810_audio: prog_dmabuf, sample rate = %d, format = %d, numfrag = %d, "
750 "fragsize = %d dmasize = %d\n",
751 dmabuf->rate, dmabuf->fmt, dmabuf->numfrag,
752 dmabuf->fragsize, dmabuf->dmasize);
753 #endif
754
755 return 0;
756 }
757 /*
758 * Clear the rest of the last i810 dma buffer, normally there is no rest
759 * because the OSS fragment size is the same as the size of this buffer.
760 */
761 static void i810_clear_tail(struct i810_state *state)
762 {
763 struct dmabuf *dmabuf = &state->dmabuf;
764 unsigned swptr;
765 unsigned char silence = (dmabuf->fmt & I810_FMT_16BIT) ? 0 : 0x80;
766 unsigned int len;
767 unsigned long flags;
768
769 spin_lock_irqsave(&state->card->lock, flags);
770 swptr = dmabuf->swptr;
771 spin_unlock_irqrestore(&state->card->lock, flags);
772
773 if(dmabuf->dmasize)
774 len = swptr % (dmabuf->dmasize/SG_LEN);
775 else
776 len = 0;
777
778 memset(dmabuf->rawbuf + swptr, silence, len);
779
780 spin_lock_irqsave(&state->card->lock, flags);
781 dmabuf->swptr += len;
782 dmabuf->count += len;
783 spin_unlock_irqrestore(&state->card->lock, flags);
784
785 /* restart the dma machine in case it is halted */
786 start_dac(state);
787 }
788
789 static int drain_dac(struct i810_state *state, int nonblock)
790 {
791 DECLARE_WAITQUEUE(wait, current);
792 struct dmabuf *dmabuf = &state->dmabuf;
793 unsigned long flags;
794 unsigned long tmo;
795 int count;
796
797 if (dmabuf->mapped || !dmabuf->ready)
798 return 0;
799
800 add_wait_queue(&dmabuf->wait, &wait);
801 for (;;) {
802 /* It seems that we have to set the current state to TASK_INTERRUPTIBLE
803 every time to make the process really go to sleep */
804 current->state = TASK_INTERRUPTIBLE;
805
806 spin_lock_irqsave(&state->card->lock, flags);
807 count = dmabuf->count;
808 spin_unlock_irqrestore(&state->card->lock, flags);
809
810 if (count <= 0)
811 break;
812
813 if (signal_pending(current))
814 break;
815
816 if (nonblock) {
817 remove_wait_queue(&dmabuf->wait, &wait);
818 current->state = TASK_RUNNING;
819 return -EBUSY;
820 }
821
822 tmo = (dmabuf->dmasize * HZ) / dmabuf->rate;
823 tmo >>= sample_shift[dmabuf->fmt];
824 if (!schedule_timeout(tmo ? tmo : 1) && tmo){
825 printk(KERN_ERR "i810_audio: drain_dac, dma timeout?\n");
826 break;
827 }
828 }
829 remove_wait_queue(&dmabuf->wait, &wait);
830 current->state = TASK_RUNNING;
831 if (signal_pending(current))
832 return -ERESTARTSYS;
833
834 return 0;
835 }
836
837 /* update buffer manangement pointers, especially, dmabuf->count and dmabuf->hwptr */
838 static void i810_update_ptr(struct i810_state *state)
839 {
840 struct dmabuf *dmabuf = &state->dmabuf;
841 unsigned hwptr, swptr;
842 int clear_cnt = 0;
843 int diff;
844 unsigned char silence;
845 // unsigned half_dmasize;
846
847 /* update hardware pointer */
848 hwptr = i810_get_dma_addr(state);
849 diff = (dmabuf->dmasize + hwptr - dmabuf->hwptr) % dmabuf->dmasize;
850 // printk("HWP %d,%d,%d\n", hwptr, dmabuf->hwptr, diff);
851 dmabuf->hwptr = hwptr;
852 dmabuf->total_bytes += diff;
853
854 /* error handling and process wake up for DAC */
855 if (dmabuf->enable == ADC_RUNNING) {
856 if (dmabuf->mapped) {
857 dmabuf->count -= diff;
858 if (dmabuf->count >= (signed)dmabuf->fragsize)
859 wake_up(&dmabuf->wait);
860 } else {
861 dmabuf->count += diff;
862
863 if (dmabuf->count < 0 || dmabuf->count > dmabuf->dmasize) {
864 /* buffer underrun or buffer overrun, we have no way to recover
865 it here, just stop the machine and let the process force hwptr
866 and swptr to sync */
867 __stop_adc(state);
868 dmabuf->error++;
869 }
870 else if (!dmabuf->endcleared) {
871 swptr = dmabuf->swptr;
872 silence = (dmabuf->fmt & I810_FMT_16BIT ? 0 : 0x80);
873 if (dmabuf->count < (signed) dmabuf->fragsize)
874 {
875 clear_cnt = dmabuf->fragsize;
876 if ((swptr + clear_cnt) > dmabuf->dmasize)
877 clear_cnt = dmabuf->dmasize - swptr;
878 memset (dmabuf->rawbuf + swptr, silence, clear_cnt);
879 dmabuf->endcleared = 1;
880 }
881 }
882 wake_up(&dmabuf->wait);
883 }
884 }
885 /* error handling and process wake up for DAC */
886 if (dmabuf->enable == DAC_RUNNING) {
887 if (dmabuf->mapped) {
888 dmabuf->count += diff;
889 if (dmabuf->count >= (signed)dmabuf->fragsize)
890 wake_up(&dmabuf->wait);
891 } else {
892 dmabuf->count -= diff;
893
894 if (dmabuf->count < 0 || dmabuf->count > dmabuf->dmasize) {
895 /* buffer underrun or buffer overrun, we have no way to recover
896 it here, just stop the machine and let the process force hwptr
897 and swptr to sync */
898 __stop_dac(state);
899 printk("DMA overrun on send\n");
900 dmabuf->error++;
901 }
902 wake_up(&dmabuf->wait);
903 }
904 }
905 }
906
907 static void i810_channel_interrupt(struct i810_card *card)
908 {
909 int i;
910
911 // printk("CHANNEL IRQ .. ");
912 for(i=0;i<NR_HW_CH;i++)
913 {
914 struct i810_state *state = card->states[i];
915 struct i810_channel *c;
916 unsigned long port = card->iobase;
917 u16 status;
918
919 if(!state)
920 continue;
921 if(!state->dmabuf.ready)
922 continue;
923 c=state->dmabuf.channel;
924
925 port+=c->port;
926
927 // printk("PORT %lX (", port);
928
929 status = inw(port + OFF_SR);
930
931 // printk("ST%d ", status);
932
933 if(status & DMA_INT_LVI)
934 {
935 /* Back to the start */
936 // printk("LVI - STOP");
937 outb((inb(port+OFF_CIV)-1)&31, port+OFF_LVI);
938 i810_update_ptr(state);
939 outb(0, port + OFF_CR);
940 }
941 if(status & DMA_INT_COMPLETE)
942 {
943 int x;
944 /* Keep the card chasing its tail */
945 outb(x=((inb(port+OFF_CIV)-1)&31), port+OFF_LVI);
946 i810_update_ptr(state);
947 // printk("COMP%d ",x);
948 }
949 // printk(")");
950 outw(status & DMA_INT_MASK, port + OFF_SR);
951 }
952 // printk("\n");
953 }
954
955 static void i810_interrupt(int irq, void *dev_id, struct pt_regs *regs)
956 {
957 struct i810_card *card = (struct i810_card *)dev_id;
958 u32 status;
959
960 spin_lock(&card->lock);
961
962 status = inl(card->iobase + GLOB_STA);
963 if(!(status & INT_MASK))
964 {
965 spin_unlock(&card->lock);
966 return; /* not for us */
967 }
968
969 // printk("Interrupt %X: ", status);
970 if(status & (INT_PO|INT_PI|INT_MC))
971 i810_channel_interrupt(card);
972
973 /* clear 'em */
974 outl(status & INT_MASK, card->iobase + GLOB_STA);
975 spin_unlock(&card->lock);
976 }
977
978 static loff_t i810_llseek(struct file *file, loff_t offset, int origin)
979 {
980 return -ESPIPE;
981 }
982
983 /* in this loop, dmabuf.count signifies the amount of data that is waiting to be copied to
984 the user's buffer. it is filled by the dma machine and drained by this loop. */
985 static ssize_t i810_read(struct file *file, char *buffer, size_t count, loff_t *ppos)
986 {
987 struct i810_state *state = (struct i810_state *)file->private_data;
988 struct dmabuf *dmabuf = &state->dmabuf;
989 ssize_t ret;
990 unsigned long flags;
991 unsigned swptr;
992 int cnt;
993
994 #ifdef DEBUG
995 printk("i810_audio: i810_read called, count = %d\n", count);
996 #endif
997
998 if (ppos != &file->f_pos)
999 return -ESPIPE;
1000 if (dmabuf->mapped)
1001 return -ENXIO;
1002 if (!dmabuf->ready && (ret = prog_dmabuf(state, 1)))
1003 return ret;
1004 if (!access_ok(VERIFY_WRITE, buffer, count))
1005 return -EFAULT;
1006 ret = 0;
1007
1008 while (count > 0) {
1009 spin_lock_irqsave(&state->card->lock, flags);
1010 if (dmabuf->count > (signed) dmabuf->dmasize) {
1011 /* buffer overrun, we are recovering from sleep_on_timeout,
1012 resync hwptr and swptr, make process flush the buffer */
1013 dmabuf->count = dmabuf->dmasize;
1014 dmabuf->swptr = dmabuf->hwptr;
1015 }
1016 swptr = dmabuf->swptr;
1017 cnt = dmabuf->dmasize - swptr;
1018 if (dmabuf->count < cnt)
1019 cnt = dmabuf->count;
1020 spin_unlock_irqrestore(&state->card->lock, flags);
1021
1022 if (cnt > count)
1023 cnt = count;
1024 if (cnt <= 0) {
1025 unsigned long tmo;
1026 /* buffer is empty, start the dma machine and wait for data to be
1027 recorded */
1028 start_adc(state);
1029 if (file->f_flags & O_NONBLOCK) {
1030 if (!ret) ret = -EAGAIN;
1031 return ret;
1032 }
1033 /* This isnt strictly right for the 810 but it'll do */
1034 tmo = (dmabuf->dmasize * HZ) / (dmabuf->rate * 2);
1035 tmo >>= sample_shift[dmabuf->fmt];
1036 /* There are two situations when sleep_on_timeout returns, one is when
1037 the interrupt is serviced correctly and the process is waked up by
1038 ISR ON TIME. Another is when timeout is expired, which means that
1039 either interrupt is NOT serviced correctly (pending interrupt) or it
1040 is TOO LATE for the process to be scheduled to run (scheduler latency)
1041 which results in a (potential) buffer overrun. And worse, there is
1042 NOTHING we can do to prevent it. */
1043 if (!interruptible_sleep_on_timeout(&dmabuf->wait, tmo)) {
1044 #ifdef DEBUG
1045 printk(KERN_ERR "i810_audio: recording schedule timeout, "
1046 "dmasz %u fragsz %u count %i hwptr %u swptr %u\n",
1047 dmabuf->dmasize, dmabuf->fragsize, dmabuf->count,
1048 dmabuf->hwptr, dmabuf->swptr);
1049 #endif
1050 /* a buffer overrun, we delay the recovery untill next time the
1051 while loop begin and we REALLY have space to record */
1052 }
1053 if (signal_pending(current)) {
1054 ret = ret ? ret : -ERESTARTSYS;
1055 return ret;
1056 }
1057 continue;
1058 }
1059
1060 if (copy_to_user(buffer, dmabuf->rawbuf + swptr, cnt)) {
1061 if (!ret) ret = -EFAULT;
1062 return ret;
1063 }
1064
1065 swptr = (swptr + cnt) % dmabuf->dmasize;
1066
1067 spin_lock_irqsave(&state->card->lock, flags);
1068 dmabuf->swptr = swptr;
1069 dmabuf->count -= cnt;
1070 spin_unlock_irqrestore(&state->card->lock, flags);
1071
1072 count -= cnt;
1073 buffer += cnt;
1074 ret += cnt;
1075 start_adc(state);
1076 }
1077 return ret;
1078 }
1079
1080 /* in this loop, dmabuf.count signifies the amount of data that is waiting to be dma to
1081 the soundcard. it is drained by the dma machine and filled by this loop. */
1082 static ssize_t i810_write(struct file *file, const char *buffer, size_t count, loff_t *ppos)
1083 {
1084 struct i810_state *state = (struct i810_state *)file->private_data;
1085 struct dmabuf *dmabuf = &state->dmabuf;
1086 ssize_t ret;
1087 unsigned long flags;
1088 unsigned swptr;
1089 int cnt;
1090
1091 #ifdef DEBUG
1092 printk("i810_audio: i810_write called, count = %d\n", count);
1093 #endif
1094
1095 if (ppos != &file->f_pos)
1096 return -ESPIPE;
1097 if (dmabuf->mapped)
1098 return -ENXIO;
1099 if (!dmabuf->ready && (ret = prog_dmabuf(state, 0)))
1100 return ret;
1101 if (!access_ok(VERIFY_READ, buffer, count))
1102 return -EFAULT;
1103 ret = 0;
1104
1105 while (count > 0) {
1106 spin_lock_irqsave(&state->card->lock, flags);
1107 if (dmabuf->count < 0) {
1108 /* buffer underrun, we are recovering from sleep_on_timeout,
1109 resync hwptr and swptr */
1110 dmabuf->count = 0;
1111 dmabuf->swptr = dmabuf->hwptr;
1112 }
1113 swptr = dmabuf->swptr;
1114 cnt = dmabuf->dmasize - swptr;
1115 if (dmabuf->count + cnt > dmabuf->dmasize)
1116 cnt = dmabuf->dmasize - dmabuf->count;
1117 spin_unlock_irqrestore(&state->card->lock, flags);
1118
1119 if (cnt > count)
1120 cnt = count;
1121 if (cnt <= 0) {
1122 unsigned long tmo;
1123 /* buffer is full, start the dma machine and wait for data to be
1124 played */
1125 start_dac(state);
1126 if (file->f_flags & O_NONBLOCK) {
1127 if (!ret) ret = -EAGAIN;
1128 return ret;
1129 }
1130 /* Not strictly correct but works */
1131 tmo = (dmabuf->dmasize * HZ) / (dmabuf->rate * 2);
1132 tmo >>= sample_shift[dmabuf->fmt];
1133 /* There are two situations when sleep_on_timeout returns, one is when
1134 the interrupt is serviced correctly and the process is waked up by
1135 ISR ON TIME. Another is when timeout is expired, which means that
1136 either interrupt is NOT serviced correctly (pending interrupt) or it
1137 is TOO LATE for the process to be scheduled to run (scheduler latency)
1138 which results in a (potential) buffer underrun. And worse, there is
1139 NOTHING we can do to prevent it. */
1140 if (!interruptible_sleep_on_timeout(&dmabuf->wait, tmo)) {
1141 #ifdef DEBUG
1142 printk(KERN_ERR "i810_audio: playback schedule timeout, "
1143 "dmasz %u fragsz %u count %i hwptr %u swptr %u\n",
1144 dmabuf->dmasize, dmabuf->fragsize, dmabuf->count,
1145 dmabuf->hwptr, dmabuf->swptr);
1146 #endif
1147 /* a buffer underrun, we delay the recovery untill next time the
1148 while loop begin and we REALLY have data to play */
1149 }
1150 if (signal_pending(current)) {
1151 if (!ret) ret = -ERESTARTSYS;
1152 return ret;
1153 }
1154 continue;
1155 }
1156 if (copy_from_user(dmabuf->rawbuf + swptr, buffer, cnt)) {
1157 if (!ret) ret = -EFAULT;
1158 return ret;
1159 }
1160
1161 swptr = (swptr + cnt) % dmabuf->dmasize;
1162
1163 spin_lock_irqsave(&state->card->lock, flags);
1164 dmabuf->swptr = swptr;
1165 dmabuf->count += cnt;
1166 dmabuf->endcleared = 0;
1167 spin_unlock_irqrestore(&state->card->lock, flags);
1168
1169 count -= cnt;
1170 buffer += cnt;
1171 ret += cnt;
1172 start_dac(state);
1173 }
1174 return ret;
1175 }
1176
1177 /* No kernel lock - we have our own spinlock */
1178 static unsigned int i810_poll(struct file *file, struct poll_table_struct *wait)
1179 {
1180 struct i810_state *state = (struct i810_state *)file->private_data;
1181 struct dmabuf *dmabuf = &state->dmabuf;
1182 unsigned long flags;
1183 unsigned int mask = 0;
1184
1185 if (file->f_mode & FMODE_WRITE) {
1186 if (!dmabuf->ready && prog_dmabuf(state, 0))
1187 return 0;
1188 poll_wait(file, &dmabuf->wait, wait);
1189 }
1190 if (file->f_mode & FMODE_READ) {
1191 if (!dmabuf->ready && prog_dmabuf(state, 1))
1192 return 0;
1193 poll_wait(file, &dmabuf->wait, wait);
1194 }
1195 spin_lock_irqsave(&state->card->lock, flags);
1196 i810_update_ptr(state);
1197 if (file->f_mode & FMODE_READ) {
1198 if (dmabuf->count >= (signed)dmabuf->fragsize)
1199 mask |= POLLIN | POLLRDNORM;
1200 }
1201 if (file->f_mode & FMODE_WRITE) {
1202 if (dmabuf->mapped) {
1203 if (dmabuf->count >= (signed)dmabuf->fragsize)
1204 mask |= POLLOUT | POLLWRNORM;
1205 } else {
1206 if ((signed)dmabuf->dmasize >= dmabuf->count + (signed)dmabuf->fragsize)
1207 mask |= POLLOUT | POLLWRNORM;
1208 }
1209 }
1210 spin_unlock_irqrestore(&state->card->lock, flags);
1211
1212 return mask;
1213 }
1214
1215 static int i810_mmap(struct file *file, struct vm_area_struct *vma)
1216 {
1217 struct i810_state *state = (struct i810_state *)file->private_data;
1218 struct dmabuf *dmabuf = &state->dmabuf;
1219 int ret = -EINVAL;
1220 unsigned long size;
1221
1222 lock_kernel();
1223 if (vma->vm_flags & VM_WRITE) {
1224 if ((ret = prog_dmabuf(state, 0)) != 0)
1225 goto out;
1226 } else if (vma->vm_flags & VM_READ) {
1227 if ((ret = prog_dmabuf(state, 1)) != 0)
1228 goto out;
1229 } else
1230 goto out;
1231
1232 ret = -EINVAL;
1233 if (vma->vm_pgoff != 0)
1234 goto out;
1235 size = vma->vm_end - vma->vm_start;
1236 if (size > (PAGE_SIZE << dmabuf->buforder))
1237 goto out;
1238 ret = -EAGAIN;
1239 if (remap_page_range(vma->vm_start, virt_to_phys(dmabuf->rawbuf),
1240 size, vma->vm_page_prot))
1241 goto out;
1242 dmabuf->mapped = 1;
1243 ret = 0;
1244 out:
1245 unlock_kernel();
1246 return ret;
1247 }
1248
1249 static int i810_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
1250 {
1251 struct i810_state *state = (struct i810_state *)file->private_data;
1252 struct dmabuf *dmabuf = &state->dmabuf;
1253 unsigned long flags;
1254 audio_buf_info abinfo;
1255 count_info cinfo;
1256 int val, mapped, ret;
1257
1258 mapped = ((file->f_mode & FMODE_WRITE) && dmabuf->mapped) ||
1259 ((file->f_mode & FMODE_READ) && dmabuf->mapped);
1260 #ifdef DEBUG
1261 printk("i810_audio: i810_ioctl, command = %2d, arg = 0x%08x\n",
1262 _IOC_NR(cmd), arg ? *(int *)arg : 0);
1263 #endif
1264
1265 switch (cmd)
1266 {
1267 case OSS_GETVERSION:
1268 return put_user(SOUND_VERSION, (int *)arg);
1269
1270 case SNDCTL_DSP_RESET:
1271 /* FIXME: spin_lock ? */
1272 if (file->f_mode & FMODE_WRITE) {
1273 stop_dac(state);
1274 synchronize_irq();
1275 dmabuf->ready = 0;
1276 resync_dma_ptrs(state);
1277 dmabuf->swptr = dmabuf->hwptr = 0;
1278 dmabuf->count = dmabuf->total_bytes = 0;
1279 }
1280 if (file->f_mode & FMODE_READ) {
1281 stop_adc(state);
1282 synchronize_irq();
1283 resync_dma_ptrs(state);
1284 dmabuf->ready = 0;
1285 dmabuf->swptr = dmabuf->hwptr = 0;
1286 dmabuf->count = dmabuf->total_bytes = 0;
1287 }
1288 return 0;
1289
1290 case SNDCTL_DSP_SYNC:
1291 if (file->f_mode & FMODE_WRITE)
1292 return drain_dac(state, file->f_flags & O_NONBLOCK);
1293 return 0;
1294
1295 case SNDCTL_DSP_SPEED: /* set smaple rate */
1296 if (get_user(val, (int *)arg))
1297 return -EFAULT;
1298 if (val >= 0) {
1299 if (file->f_mode & FMODE_WRITE) {
1300 stop_dac(state);
1301 dmabuf->ready = 0;
1302 spin_lock_irqsave(&state->card->lock, flags);
1303 i810_set_dac_rate(state, val);
1304 spin_unlock_irqrestore(&state->card->lock, flags);
1305 }
1306 if (file->f_mode & FMODE_READ) {
1307 stop_adc(state);
1308 dmabuf->ready = 0;
1309 spin_lock_irqsave(&state->card->lock, flags);
1310 i810_set_adc_rate(state, val);
1311 spin_unlock_irqrestore(&state->card->lock, flags);
1312 }
1313 }
1314 return put_user(dmabuf->rate, (int *)arg);
1315
1316 case SNDCTL_DSP_STEREO: /* set stereo or mono channel */
1317 if (get_user(val, (int *)arg))
1318 return -EFAULT;
1319 if(val==0)
1320 return -EINVAL;
1321 if (file->f_mode & FMODE_WRITE) {
1322 stop_dac(state);
1323 dmabuf->ready = 0;
1324 dmabuf->fmt = I810_FMT_STEREO;
1325 }
1326 if (file->f_mode & FMODE_READ) {
1327 stop_adc(state);
1328 dmabuf->ready = 0;
1329 dmabuf->fmt = I810_FMT_STEREO;
1330 }
1331 return 0;
1332
1333 case SNDCTL_DSP_GETBLKSIZE:
1334 if (file->f_mode & FMODE_WRITE) {
1335 if ((val = prog_dmabuf(state, 0)))
1336 return val;
1337 return put_user(dmabuf->fragsize, (int *)arg);
1338 }
1339 if (file->f_mode & FMODE_READ) {
1340 if ((val = prog_dmabuf(state, 1)))
1341 return val;
1342 return put_user(dmabuf->fragsize, (int *)arg);
1343 }
1344
1345 case SNDCTL_DSP_GETFMTS: /* Returns a mask of supported sample format*/
1346 return put_user(AFMT_S16_LE, (int *)arg);
1347
1348 case SNDCTL_DSP_SETFMT: /* Select sample format */
1349 if (get_user(val, (int *)arg))
1350 return -EFAULT;
1351 if (val != AFMT_QUERY) {
1352 if (file->f_mode & FMODE_WRITE) {
1353 stop_dac(state);
1354 dmabuf->ready = 0;
1355 }
1356 if (file->f_mode & FMODE_READ) {
1357 stop_adc(state);
1358 dmabuf->ready = 0;
1359 }
1360 }
1361 return put_user(AFMT_S16_LE, (int *)arg);
1362
1363 case SNDCTL_DSP_CHANNELS:
1364 if (get_user(val, (int *)arg))
1365 return -EFAULT;
1366 if (val != 0) {
1367 if (file->f_mode & FMODE_WRITE) {
1368 stop_dac(state);
1369 dmabuf->ready = 0;
1370 }
1371 if (file->f_mode & FMODE_READ) {
1372 stop_adc(state);
1373 dmabuf->ready = 0;
1374 }
1375 }
1376 return put_user(2, (int *)arg);
1377
1378 case SNDCTL_DSP_POST:
1379 /* FIXME: the same as RESET ?? */
1380 return 0;
1381
1382 case SNDCTL_DSP_SUBDIVIDE:
1383 if (dmabuf->subdivision)
1384 return -EINVAL;
1385 if (get_user(val, (int *)arg))
1386 return -EFAULT;
1387 if (val != 1 && val != 2 && val != 4)
1388 return -EINVAL;
1389 dmabuf->subdivision = val;
1390 return 0;
1391
1392 case SNDCTL_DSP_SETFRAGMENT:
1393 if (get_user(val, (int *)arg))
1394 return -EFAULT;
1395
1396 dmabuf->ossfragshift = val & 0xffff;
1397 dmabuf->ossmaxfrags = (val >> 16) & 0xffff;
1398 if (dmabuf->ossfragshift < 4)
1399 dmabuf->ossfragshift = 4;
1400 if (dmabuf->ossfragshift > 15)
1401 dmabuf->ossfragshift = 15;
1402 if (dmabuf->ossmaxfrags < 4)
1403 dmabuf->ossmaxfrags = 4;
1404
1405 return 0;
1406
1407 case SNDCTL_DSP_GETOSPACE:
1408 if (!(file->f_mode & FMODE_WRITE))
1409 return -EINVAL;
1410 if (!dmabuf->enable && (val = prog_dmabuf(state, 0)) != 0)
1411 return val;
1412 spin_lock_irqsave(&state->card->lock, flags);
1413 i810_update_ptr(state);
1414 abinfo.fragsize = dmabuf->fragsize;
1415 abinfo.bytes = dmabuf->dmasize - dmabuf->count;
1416 abinfo.fragstotal = dmabuf->numfrag;
1417 abinfo.fragments = abinfo.bytes >> dmabuf->fragshift;
1418 spin_unlock_irqrestore(&state->card->lock, flags);
1419 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1420
1421 case SNDCTL_DSP_GETISPACE:
1422 if (!(file->f_mode & FMODE_READ))
1423 return -EINVAL;
1424 if (!dmabuf->enable && (val = prog_dmabuf(state, 1)) != 0)
1425 return val;
1426 spin_lock_irqsave(&state->card->lock, flags);
1427 i810_update_ptr(state);
1428 abinfo.fragsize = dmabuf->fragsize;
1429 abinfo.bytes = dmabuf->count;
1430 abinfo.fragstotal = dmabuf->numfrag;
1431 abinfo.fragments = abinfo.bytes >> dmabuf->fragshift;
1432 spin_unlock_irqrestore(&state->card->lock, flags);
1433 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1434
1435 case SNDCTL_DSP_NONBLOCK:
1436 file->f_flags |= O_NONBLOCK;
1437 return 0;
1438
1439 case SNDCTL_DSP_GETCAPS:
1440 return put_user(DSP_CAP_REALTIME|DSP_CAP_TRIGGER|DSP_CAP_MMAP|DSP_CAP_BIND,
1441 (int *)arg);
1442
1443 case SNDCTL_DSP_GETTRIGGER:
1444 val = 0;
1445 if (file->f_mode & FMODE_READ && dmabuf->enable)
1446 val |= PCM_ENABLE_INPUT;
1447 if (file->f_mode & FMODE_WRITE && dmabuf->enable)
1448 val |= PCM_ENABLE_OUTPUT;
1449 return put_user(val, (int *)arg);
1450
1451 case SNDCTL_DSP_SETTRIGGER:
1452 if (get_user(val, (int *)arg))
1453 return -EFAULT;
1454 if (file->f_mode & FMODE_READ) {
1455 if (val & PCM_ENABLE_INPUT) {
1456 if (!dmabuf->ready && (ret = prog_dmabuf(state, 1)))
1457 return ret;
1458 start_adc(state);
1459 } else
1460 stop_adc(state);
1461 }
1462 if (file->f_mode & FMODE_WRITE) {
1463 if (val & PCM_ENABLE_OUTPUT) {
1464 if (!dmabuf->ready && (ret = prog_dmabuf(state, 0)))
1465 return ret;
1466 start_dac(state);
1467 } else
1468 stop_dac(state);
1469 }
1470 return 0;
1471
1472 case SNDCTL_DSP_GETIPTR:
1473 if (!(file->f_mode & FMODE_READ))
1474 return -EINVAL;
1475 spin_lock_irqsave(&state->card->lock, flags);
1476 i810_update_ptr(state);
1477 cinfo.bytes = dmabuf->total_bytes;
1478 cinfo.blocks = dmabuf->count >> dmabuf->fragshift;
1479 cinfo.ptr = dmabuf->hwptr;
1480 if (dmabuf->mapped)
1481 dmabuf->count &= dmabuf->fragsize-1;
1482 spin_unlock_irqrestore(&state->card->lock, flags);
1483 return copy_to_user((void *)arg, &cinfo, sizeof(cinfo));
1484
1485 case SNDCTL_DSP_GETOPTR:
1486 if (!(file->f_mode & FMODE_WRITE))
1487 return -EINVAL;
1488 spin_lock_irqsave(&state->card->lock, flags);
1489 i810_update_ptr(state);
1490 cinfo.bytes = dmabuf->total_bytes;
1491 cinfo.blocks = dmabuf->count >> dmabuf->fragshift;
1492 cinfo.ptr = dmabuf->hwptr;
1493 if (dmabuf->mapped)
1494 dmabuf->count &= dmabuf->fragsize-1;
1495 spin_unlock_irqrestore(&state->card->lock, flags);
1496 return copy_to_user((void *)arg, &cinfo, sizeof(cinfo));
1497
1498 case SNDCTL_DSP_SETDUPLEX:
1499 return -EINVAL;
1500
1501 case SNDCTL_DSP_GETODELAY:
1502 if (!(file->f_mode & FMODE_WRITE))
1503 return -EINVAL;
1504 spin_lock_irqsave(&state->card->lock, flags);
1505 i810_update_ptr(state);
1506 val = dmabuf->count;
1507 spin_unlock_irqrestore(&state->card->lock, flags);
1508 return put_user(val, (int *)arg);
1509
1510 case SOUND_PCM_READ_RATE:
1511 return put_user(dmabuf->rate, (int *)arg);
1512
1513 case SOUND_PCM_READ_CHANNELS:
1514 return put_user((dmabuf->fmt & I810_FMT_STEREO) ? 2 : 1,
1515 (int *)arg);
1516
1517 case SOUND_PCM_READ_BITS:
1518 return put_user(AFMT_S16_LE, (int *)arg);
1519
1520 case SNDCTL_DSP_MAPINBUF:
1521 case SNDCTL_DSP_MAPOUTBUF:
1522 case SNDCTL_DSP_SETSYNCRO:
1523 case SOUND_PCM_WRITE_FILTER:
1524 case SOUND_PCM_READ_FILTER:
1525 return -EINVAL;
1526 }
1527 return -EINVAL;
1528 }
1529
1530 static int i810_open(struct inode *inode, struct file *file)
1531 {
1532 int i = 0;
1533 struct i810_card *card = devs;
1534 struct i810_state *state = NULL;
1535 struct dmabuf *dmabuf = NULL;
1536
1537 /* find an avaiable virtual channel (instance of /dev/dsp) */
1538 while (card != NULL) {
1539 for (i = 0; i < NR_HW_CH; i++) {
1540 if (card->states[i] == NULL) {
1541 state = card->states[i] = (struct i810_state *)
1542 kmalloc(sizeof(struct i810_state), GFP_KERNEL);
1543 if (state == NULL)
1544 return -ENOMEM;
1545 memset(state, 0, sizeof(struct i810_state));
1546 dmabuf = &state->dmabuf;
1547 goto found_virt;
1548 }
1549 }
1550 card = card->next;
1551 }
1552 /* no more virtual channel avaiable */
1553 if (!state)
1554 return -ENODEV;
1555
1556 found_virt:
1557 /* found a free virtual channel, allocate hardware channels */
1558 if(file->f_mode & FMODE_READ)
1559 dmabuf->channel = card->alloc_rec_pcm_channel(card);
1560 else
1561 dmabuf->channel = card->alloc_pcm_channel(card);
1562
1563 if (dmabuf->channel == NULL) {
1564 kfree (card->states[i]);
1565 card->states[i] = NULL;;
1566 return -ENODEV;
1567 }
1568
1569 /* initialize the virtual channel */
1570 state->virt = i;
1571 state->card = card;
1572 state->magic = I810_STATE_MAGIC;
1573 init_waitqueue_head(&dmabuf->wait);
1574 init_MUTEX(&state->open_sem);
1575 file->private_data = state;
1576
1577 down(&state->open_sem);
1578
1579 /* set default sample format. According to OSS Programmer's Guide /dev/dsp
1580 should be default to unsigned 8-bits, mono, with sample rate 8kHz and
1581 /dev/dspW will accept 16-bits sample */
1582 if (file->f_mode & FMODE_WRITE) {
1583 dmabuf->fmt &= ~I810_FMT_MASK;
1584 dmabuf->fmt |= I810_FMT_16BIT;
1585 dmabuf->ossfragshift = 0;
1586 dmabuf->ossmaxfrags = 0;
1587 dmabuf->subdivision = 0;
1588 i810_set_dac_rate(state, 48000);
1589 }
1590
1591 if (file->f_mode & FMODE_READ) {
1592 dmabuf->fmt &= ~I810_FMT_MASK;
1593 dmabuf->fmt |= I810_FMT_16BIT;
1594 dmabuf->ossfragshift = 0;
1595 dmabuf->ossmaxfrags = 0;
1596 dmabuf->subdivision = 0;
1597 i810_set_adc_rate(state, 48000);
1598 }
1599
1600 state->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE);
1601 up(&state->open_sem);
1602
1603 return 0;
1604 }
1605
1606 static int i810_release(struct inode *inode, struct file *file)
1607 {
1608 struct i810_state *state = (struct i810_state *)file->private_data;
1609 struct dmabuf *dmabuf = &state->dmabuf;
1610
1611 lock_kernel();
1612 if (file->f_mode & FMODE_WRITE) {
1613 i810_clear_tail(state);
1614 drain_dac(state, file->f_flags & O_NONBLOCK);
1615 }
1616
1617 /* stop DMA state machine and free DMA buffers/channels */
1618 down(&state->open_sem);
1619
1620 if (file->f_mode & FMODE_WRITE) {
1621 stop_dac(state);
1622 dealloc_dmabuf(state);
1623 state->card->free_pcm_channel(state->card, dmabuf->channel->num);
1624 }
1625 if (file->f_mode & FMODE_READ) {
1626 stop_adc(state);
1627 dealloc_dmabuf(state);
1628 state->card->free_pcm_channel(state->card, dmabuf->channel->num);
1629 }
1630
1631 /* we're covered by the open_sem */
1632 up(&state->open_sem);
1633
1634 kfree(state->card->states[state->virt]);
1635 state->card->states[state->virt] = NULL;
1636 unlock_kernel();
1637
1638 return 0;
1639 }
1640
1641 static /*const*/ struct file_operations i810_audio_fops = {
1642 owner: THIS_MODULE,
1643 llseek: i810_llseek,
1644 read: i810_read,
1645 write: i810_write,
1646 poll: i810_poll,
1647 ioctl: i810_ioctl,
1648 mmap: i810_mmap,
1649 open: i810_open,
1650 release: i810_release,
1651 };
1652
1653 /* Write AC97 codec registers */
1654
1655 static u16 i810_ac97_get(struct ac97_codec *dev, u8 reg)
1656 {
1657 struct i810_card *card = dev->private_data;
1658 int count = 100;
1659
1660 while(count-- && (inb(card->iobase + CAS) & 1))
1661 udelay(1);
1662 return inw(card->ac97base + (reg&0x7f));
1663 }
1664
1665 static void i810_ac97_set(struct ac97_codec *dev, u8 reg, u16 data)
1666 {
1667 struct i810_card *card = dev->private_data;
1668 int count = 100;
1669
1670 while(count-- && (inb(card->iobase + CAS) & 1))
1671 udelay(1);
1672 outw(data, card->ac97base + (reg&0x7f));
1673 }
1674
1675
1676 /* OSS /dev/mixer file operation methods */
1677
1678 static int i810_open_mixdev(struct inode *inode, struct file *file)
1679 {
1680 int i;
1681 int minor = MINOR(inode->i_rdev);
1682 struct i810_card *card = devs;
1683
1684 for (card = devs; card != NULL; card = card->next)
1685 for (i = 0; i < NR_AC97; i++)
1686 if (card->ac97_codec[i] != NULL &&
1687 card->ac97_codec[i]->dev_mixer == minor)
1688 goto match;
1689
1690 if (!card)
1691 return -ENODEV;
1692
1693 match:
1694 file->private_data = card->ac97_codec[i];
1695
1696 return 0;
1697 }
1698
1699 static int i810_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd,
1700 unsigned long arg)
1701 {
1702 struct ac97_codec *codec = (struct ac97_codec *)file->private_data;
1703
1704 return codec->mixer_ioctl(codec, cmd, arg);
1705 }
1706
1707 static /*const*/ struct file_operations i810_mixer_fops = {
1708 owner: THIS_MODULE,
1709 llseek: i810_llseek,
1710 ioctl: i810_ioctl_mixdev,
1711 open: i810_open_mixdev,
1712 };
1713
1714 /* AC97 codec initialisation. */
1715 static int __init i810_ac97_init(struct i810_card *card)
1716 {
1717 int num_ac97 = 0;
1718 int ready_2nd = 0;
1719 struct ac97_codec *codec;
1720 u16 eid;
1721 int i=0;
1722 u32 reg;
1723
1724 reg = inl(card->iobase + GLOB_CNT);
1725
1726 if((reg&2)==0) /* Cold required */
1727 reg|=2;
1728 else
1729 reg|=4; /* Warm */
1730
1731 reg&=~8; /* ACLink on */
1732 outl(reg , card->iobase + GLOB_CNT);
1733
1734 while(i<10)
1735 {
1736 if((inl(card->iobase+GLOB_CNT)&4)==0)
1737 break;
1738 current->state = TASK_UNINTERRUPTIBLE;
1739 schedule_timeout(HZ/20);
1740 i++;
1741 }
1742 if(i==10)
1743 {
1744 printk(KERN_ERR "i810_audio: AC'97 reset failed.\n");
1745 return 0;
1746 }
1747
1748 current->state = TASK_UNINTERRUPTIBLE;
1749 schedule_timeout(HZ/5);
1750
1751 inw(card->ac97base);
1752
1753 for (num_ac97 = 0; num_ac97 < NR_AC97; num_ac97++) {
1754 if ((codec = kmalloc(sizeof(struct ac97_codec), GFP_KERNEL)) == NULL)
1755 return -ENOMEM;
1756 memset(codec, 0, sizeof(struct ac97_codec));
1757
1758 /* initialize some basic codec information, other fields will be filled
1759 in ac97_probe_codec */
1760 codec->private_data = card;
1761 codec->id = num_ac97;
1762
1763 codec->codec_read = i810_ac97_get;
1764 codec->codec_write = i810_ac97_set;
1765
1766 if (ac97_probe_codec(codec) == 0)
1767 break;
1768
1769 eid = i810_ac97_get(codec, AC97_EXTENDED_ID);
1770
1771 if(eid==0xFFFFFF)
1772 {
1773 printk(KERN_WARNING "i810_audio: no codec attached ?\n");
1774 kfree(codec);
1775 break;
1776 }
1777
1778 card->ac97_features = eid;
1779
1780 /* Now check the codec for useful features to make up for
1781 the dumbness of the 810 hardware engine */
1782
1783 if(!(eid&0x0001))
1784 printk(KERN_WARNING "i810_audio: only 48Khz playback available.\n");
1785 else
1786 {
1787 /* Enable variable rate mode */
1788 i810_ac97_set(codec, AC97_EXTENDED_STATUS, 9);
1789 i810_ac97_set(codec,AC97_EXTENDED_STATUS,
1790 i810_ac97_get(codec, AC97_EXTENDED_STATUS)|0xE800);
1791 /* power up everything, modify this when implementing power saving */
1792 i810_ac97_set(codec, AC97_POWER_CONTROL,
1793 i810_ac97_get(codec, AC97_POWER_CONTROL) & ~0x7f00);
1794 /* wait for analog ready */
1795 for (i=10;
1796 i && ((i810_ac97_get(codec, AC97_POWER_CONTROL) & 0xf) != 0xf);
1797 i--)
1798 {
1799 current->state = TASK_UNINTERRUPTIBLE;
1800 schedule_timeout(HZ/20);
1801 }
1802
1803 if(!(i810_ac97_get(codec, AC97_EXTENDED_STATUS)&1))
1804 {
1805 printk(KERN_WARNING "i810_audio: Codec refused to allow VRA, using 48Khz only.\n");
1806 card->ac97_features&=~1;
1807 }
1808 }
1809
1810 if ((codec->dev_mixer = register_sound_mixer(&i810_mixer_fops, -1)) < 0) {
1811 printk(KERN_ERR "i810_audio: couldn't register mixer!\n");
1812 kfree(codec);
1813 break;
1814 }
1815
1816 card->ac97_codec[num_ac97] = codec;
1817
1818 /* if there is no secondary codec at all, don't probe any more */
1819 if (!ready_2nd)
1820 return num_ac97+1;
1821 }
1822 return num_ac97;
1823 }
1824
1825 /* install the driver, we do not allocate hardware channel nor DMA buffer now, they are defered
1826 untill "ACCESS" time (in prog_dmabuf called by open/read/write/ioctl/mmap) */
1827
1828 static int __init i810_probe(struct pci_dev *pci_dev, const struct pci_device_id *pci_id)
1829 {
1830 struct i810_card *card;
1831
1832 if (!pci_dma_supported(pci_dev, I810_DMA_MASK)) {
1833 printk(KERN_ERR "intel810: architecture does not support"
1834 " 32bit PCI busmaster DMA\n");
1835 return -ENODEV;
1836 }
1837
1838 if (pci_enable_device(pci_dev))
1839 return -EIO;
1840 if ((card = kmalloc(sizeof(struct i810_card), GFP_KERNEL)) == NULL) {
1841 printk(KERN_ERR "i810_audio: out of memory\n");
1842 return -ENOMEM;
1843 }
1844 memset(card, 0, sizeof(*card));
1845
1846 card->iobase = pci_resource_start (pci_dev, 1);
1847 card->ac97base = pci_resource_start (pci_dev, 0);
1848 card->pci_dev = pci_dev;
1849 card->pci_id = pci_id->device;
1850 card->irq = pci_dev->irq;
1851 card->next = devs;
1852 card->magic = I810_CARD_MAGIC;
1853 spin_lock_init(&card->lock);
1854 devs = card;
1855
1856 pci_set_master(pci_dev);
1857
1858 printk(KERN_INFO "i810: %s found at IO 0x%04lx and 0x%04lx, IRQ %d\n",
1859 card_names[pci_id->driver_data], card->iobase, card->ac97base,
1860 card->irq);
1861
1862 card->alloc_pcm_channel = i810_alloc_pcm_channel;
1863 card->alloc_rec_pcm_channel = i810_alloc_rec_pcm_channel;
1864 card->free_pcm_channel = i810_free_pcm_channel;
1865
1866 /* claim our iospace and irq */
1867 request_region(card->iobase, 64, card_names[pci_id->driver_data]);
1868 request_region(card->ac97base, 256, card_names[pci_id->driver_data]);
1869
1870 if (request_irq(card->irq, &i810_interrupt, SA_SHIRQ,
1871 card_names[pci_id->driver_data], card)) {
1872 printk(KERN_ERR "i810_audio: unable to allocate irq %d\n", card->irq);
1873 release_region(card->iobase, 64);
1874 release_region(card->ac97base, 256);
1875 kfree(card);
1876 return -ENODEV;
1877 }
1878 /* register /dev/dsp */
1879 if ((card->dev_audio = register_sound_dsp(&i810_audio_fops, -1)) < 0) {
1880 printk(KERN_ERR "i810_audio: couldn't register DSP device!\n");
1881 release_region(card->iobase, 64);
1882 release_region(card->ac97base, 256);
1883 free_irq(card->irq, card);
1884 kfree(card);
1885 return -ENODEV;
1886 }
1887
1888
1889 /* initialize AC97 codec and register /dev/mixer */
1890 if (i810_ac97_init(card) <= 0) {
1891 unregister_sound_dsp(card->dev_audio);
1892 release_region(card->iobase, 64);
1893 release_region(card->ac97base, 256);
1894 free_irq(card->irq, card);
1895 kfree(card);
1896 return -ENODEV;
1897 }
1898 pci_dev->driver_data = card;
1899 pci_dev->dma_mask = I810_DMA_MASK;
1900 return 0;
1901 }
1902
1903 static void __exit i810_remove(struct pci_dev *pci_dev)
1904 {
1905 int i;
1906 struct i810_card *card = pci_dev->driver_data;
1907 /* free hardware resources */
1908 free_irq(card->irq, devs);
1909 release_region(card->iobase, 64);
1910 release_region(card->ac97base, 256);
1911
1912 /* unregister audio devices */
1913 for (i = 0; i < NR_AC97; i++)
1914 if (devs->ac97_codec[i] != NULL) {
1915 unregister_sound_mixer(card->ac97_codec[i]->dev_mixer);
1916 kfree (card->ac97_codec[i]);
1917 }
1918 unregister_sound_dsp(card->dev_audio);
1919 kfree(card);
1920 }
1921
1922
1923 MODULE_AUTHOR("");
1924 MODULE_DESCRIPTION("Intel 810 audio support");
1925 MODULE_PARM(ftsodell, "i");
1926 MODULE_PARM(clocking, "i");
1927
1928 #define I810_MODULE_NAME "intel810_audio"
1929
1930 static struct pci_driver i810_pci_driver = {
1931 name: I810_MODULE_NAME,
1932 id_table: i810_pci_tbl,
1933 probe: i810_probe,
1934 remove: i810_remove,
1935 };
1936
1937 static int __init i810_init_module (void)
1938 {
1939 if (!pci_present()) /* No PCI bus in this machine! */
1940 return -ENODEV;
1941
1942 if(ftsodell==1)
1943 clocking=41194;
1944
1945 printk(KERN_INFO "Intel 810 + AC97 Audio, version "
1946 DRIVER_VERSION ", " __TIME__ " " __DATE__ "\n");
1947
1948 if (!pci_register_driver(&i810_pci_driver)) {
1949 pci_unregister_driver(&i810_pci_driver);
1950 return -ENODEV;
1951 }
1952 return 0;
1953 }
1954
1955 static void __exit i810_cleanup_module (void)
1956 {
1957 pci_unregister_driver(&i810_pci_driver);
1958 }
1959
1960 module_init(i810_init_module);
1961 module_exit(i810_cleanup_module);
1962
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