1 /*
2 * Register information for the Weitek P9100 as found
3 * on the Tadpole Sparcbook 3 laptops.
4 *
5 * From the technical specification document provided by Tadpole.
6 *
7 * Derrick J Brashear (shadow@dementia.org)
8 */
9
10 #ifndef _P9100_H_
11 #define _P9100_H_
12
13 /* P9100 control registers */
14 #define P9100_SYSCTL_OFF 0x0UL
15 #define P9100_VIDEOCTL_OFF 0x100UL
16 #define P9100_VRAMCTL_OFF 0x180UL
17 #define P9100_RAMDAC_OFF 0x200UL
18 #define P9100_VIDEOCOPROC_OFF 0x400UL
19
20 /* P9100 command registers */
21 #define P9100_CMD_OFF 0x0UL
22
23 /* P9100 framebuffer memory */
24 #define P9100_FB_OFF 0x0UL
25
26
27 /* 3 bits: 2=8bpp 3=16bpp 5=32bpp 7=24bpp */
28 #define SYS_CONFIG_PIXELSIZE_SHIFT 26
29
30 #define SCREENPAINT_TIMECTL1_ENABLE_VIDEO 0x20 /* 0 = off, 1 = on */
31
32 struct p9100_ctrl {
33 /* Registers for the system control */
34 __volatile__ __u32 sys_base;
35 __volatile__ __u32 sys_config;
36 __volatile__ __u32 sys_intr;
37 __volatile__ __u32 sys_int_ena;
38 __volatile__ __u32 sys_alt_rd;
39 __volatile__ __u32 sys_alt_wr;
40 __volatile__ __u32 sys_xxx[58];
41 /* Registers for the video control */
42 __volatile__ __u32 vid_base;
43 __volatile__ __u32 vid_hcnt;
44 __volatile__ __u32 vid_htotal;
45 __volatile__ __u32 vid_hsync_rise;
46 __volatile__ __u32 vid_hblank_rise;
47 __volatile__ __u32 vid_hblank_fall;
48 __volatile__ __u32 vid_hcnt_preload;
49 __volatile__ __u32 vid_vcnt;
50 __volatile__ __u32 vid_vlen;
51 __volatile__ __u32 vid_vsync_rise;
52 __volatile__ __u32 vid_vblank_rise;
53 __volatile__ __u32 vid_vblank_fall;
54 __volatile__ __u32 vid_vcnt_preload;
55 __volatile__ __u32 vid_screenpaint_addr;
56 __volatile__ __u32 vid_screenpaint_timectl1;
57 __volatile__ __u32 vid_screenpaint_qsfcnt;
58 __volatile__ __u32 vid_screenpaint_timectl2;
59 __volatile__ __u32 vid_xxx[15];
60 /* Registers for the video control */
61 __volatile__ __u32 vram_base;
62 __volatile__ __u32 vram_memcfg;
63 __volatile__ __u32 vram_refresh_pd;
64 __volatile__ __u32 vram_refresh_cnt;
65 __volatile__ __u32 vram_raslo_max;
66 __volatile__ __u32 vram_raslo_cur;
67 __volatile__ __u32 pwrup_cfg;
68 __volatile__ __u32 vram_xxx[25];
69 /* Registers for IBM RGB528 Palette */
70 __volatile__ __u32 ramdac_cmap_wridx;
71 __volatile__ __u32 ramdac_palette_data;
72 __volatile__ __u32 ramdac_pixel_mask;
73 __volatile__ __u32 ramdac_palette_rdaddr;
74 __volatile__ __u32 ramdac_idx_lo;
75 __volatile__ __u32 ramdac_idx_hi;
76 __volatile__ __u32 ramdac_idx_data;
77 __volatile__ __u32 ramdac_idx_ctl;
78 __volatile__ __u32 ramdac_xxx[1784];
79 };
80
81 struct p9100_cmd_parameng {
82 __volatile__ __u32 parameng_status;
83 __volatile__ __u32 parameng_bltcmd;
84 __volatile__ __u32 parameng_quadcmd;
85 };
86
87 #endif /* _P9100_H_ */
88
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