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Linux Cross Reference
Linux/include/asm-alpha/pgtable.h

Version: ~ [ 2.4.0 ] ~
Architecture: ~ [ i386 ] ~ [ alpha ] ~ [ m68k ] ~ [ mips ] ~ [ ppc ] ~ [ sparc ] ~ [ sparc64 ] ~

  1 #ifndef _ALPHA_PGTABLE_H
  2 #define _ALPHA_PGTABLE_H
  3 
  4 /*
  5  * This file contains the functions and defines necessary to modify and use
  6  * the Alpha page table tree.
  7  *
  8  * This hopefully works with any standard Alpha page-size, as defined
  9  * in <asm/page.h> (currently 8192).
 10  */
 11 #include <linux/config.h>
 12 
 13 #include <asm/page.h>
 14 #include <asm/processor.h>      /* For TASK_SIZE */
 15 #include <asm/machvec.h>
 16 
 17 /* Certain architectures need to do special things when PTEs
 18  * within a page table are directly modified.  Thus, the following
 19  * hook is made available.
 20  */
 21 #define set_pte(pteptr, pteval) ((*(pteptr)) = (pteval))
 22 
 23 /* PMD_SHIFT determines the size of the area a second-level page table can map */
 24 #define PMD_SHIFT       (PAGE_SHIFT + (PAGE_SHIFT-3))
 25 #define PMD_SIZE        (1UL << PMD_SHIFT)
 26 #define PMD_MASK        (~(PMD_SIZE-1))
 27 
 28 /* PGDIR_SHIFT determines what a third-level page table entry can map */
 29 #define PGDIR_SHIFT     (PAGE_SHIFT + 2*(PAGE_SHIFT-3))
 30 #define PGDIR_SIZE      (1UL << PGDIR_SHIFT)
 31 #define PGDIR_MASK      (~(PGDIR_SIZE-1))
 32 
 33 /*
 34  * Entries per page directory level:  the Alpha is three-level, with
 35  * all levels having a one-page page table.
 36  */
 37 #define PTRS_PER_PTE    (1UL << (PAGE_SHIFT-3))
 38 #define PTRS_PER_PMD    (1UL << (PAGE_SHIFT-3))
 39 #define PTRS_PER_PGD    (1UL << (PAGE_SHIFT-3))
 40 #define USER_PTRS_PER_PGD       (TASK_SIZE / PGDIR_SIZE)
 41 #define FIRST_USER_PGD_NR       0
 42 
 43 /* Number of pointers that fit on a page:  this will go away. */
 44 #define PTRS_PER_PAGE   (1UL << (PAGE_SHIFT-3))
 45 
 46 #ifdef CONFIG_ALPHA_LARGE_VMALLOC
 47 #define VMALLOC_START           0xfffffe0000000000
 48 #else
 49 #define VMALLOC_START           (-2*PGDIR_SIZE)
 50 #endif
 51 #define VMALLOC_VMADDR(x)       ((unsigned long)(x))
 52 #define VMALLOC_END             (-PGDIR_SIZE)
 53 
 54 /*
 55  * OSF/1 PAL-code-imposed page table bits
 56  */
 57 #define _PAGE_VALID     0x0001
 58 #define _PAGE_FOR       0x0002  /* used for page protection (fault on read) */
 59 #define _PAGE_FOW       0x0004  /* used for page protection (fault on write) */
 60 #define _PAGE_FOE       0x0008  /* used for page protection (fault on exec) */
 61 #define _PAGE_ASM       0x0010
 62 #if defined(CONFIG_ALPHA_EV6) && !defined(CONFIG_SMP)
 63 #define _PAGE_MBE       0x0080  /* MB disable bit for EV6.  */
 64 #else
 65 #define _PAGE_MBE       0x0000
 66 #endif
 67 #define _PAGE_KRE       0x0100  /* xxx - see below on the "accessed" bit */
 68 #define _PAGE_URE       0x0200  /* xxx */
 69 #define _PAGE_KWE       0x1000  /* used to do the dirty bit in software */
 70 #define _PAGE_UWE       0x2000  /* used to do the dirty bit in software */
 71 
 72 /* .. and these are ours ... */
 73 #define _PAGE_DIRTY     0x20000
 74 #define _PAGE_ACCESSED  0x40000
 75 
 76 /*
 77  * NOTE! The "accessed" bit isn't necessarily exact:  it can be kept exactly
 78  * by software (use the KRE/URE/KWE/UWE bits appropriately), but I'll fake it.
 79  * Under Linux/AXP, the "accessed" bit just means "read", and I'll just use
 80  * the KRE/URE bits to watch for it. That way we don't need to overload the
 81  * KWE/UWE bits with both handling dirty and accessed.
 82  *
 83  * Note that the kernel uses the accessed bit just to check whether to page
 84  * out a page or not, so it doesn't have to be exact anyway.
 85  */
 86 
 87 #define __DIRTY_BITS    (_PAGE_DIRTY | _PAGE_KWE | _PAGE_UWE)
 88 #define __ACCESS_BITS   (_PAGE_ACCESSED | _PAGE_KRE | _PAGE_URE)
 89 
 90 #define _PFN_MASK       0xFFFFFFFF00000000
 91 
 92 #define _PAGE_TABLE     (_PAGE_VALID | __DIRTY_BITS | __ACCESS_BITS)
 93 #define _PAGE_CHG_MASK  (_PFN_MASK | __DIRTY_BITS | __ACCESS_BITS | _PAGE_MBE)
 94 
 95 /*
 96  * All the normal masks have the "page accessed" bits on, as any time they
 97  * are used, the page is accessed.  They are cleared only by the page-out
 98  * routines. 
 99  */
100 #define PAGE_NONE       __pgprot(_PAGE_VALID | __ACCESS_BITS | _PAGE_FOR | _PAGE_FOW | _PAGE_FOE)
101 #define PAGE_SHARED     __pgprot(_PAGE_VALID | __ACCESS_BITS)
102 #define PAGE_COPY       __pgprot(_PAGE_VALID | __ACCESS_BITS | _PAGE_FOW)
103 #define PAGE_READONLY   __pgprot(_PAGE_VALID | __ACCESS_BITS | _PAGE_FOW)
104 #define PAGE_KERNEL     __pgprot(_PAGE_VALID | _PAGE_ASM | _PAGE_KRE | _PAGE_KWE | _PAGE_MBE)
105 
106 #define _PAGE_NORMAL(x) __pgprot(_PAGE_VALID | __ACCESS_BITS | _PAGE_MBE | (x))
107 
108 #define _PAGE_P(x) _PAGE_NORMAL((x) | (((x) & _PAGE_FOW)?0:_PAGE_FOW))
109 #define _PAGE_S(x) _PAGE_NORMAL(x)
110 
111 /*
112  * The hardware can handle write-only mappings, but as the Alpha
113  * architecture does byte-wide writes with a read-modify-write
114  * sequence, it's not practical to have write-without-read privs.
115  * Thus the "-w- -> rw-" and "-wx -> rwx" mapping here (and in
116  * arch/alpha/mm/fault.c)
117  */
118         /* xwr */
119 #define __P000  _PAGE_P(_PAGE_FOE | _PAGE_FOW | _PAGE_FOR)
120 #define __P001  _PAGE_P(_PAGE_FOE | _PAGE_FOW)
121 #define __P010  _PAGE_P(_PAGE_FOE)
122 #define __P011  _PAGE_P(_PAGE_FOE)
123 #define __P100  _PAGE_P(_PAGE_FOW | _PAGE_FOR)
124 #define __P101  _PAGE_P(_PAGE_FOW)
125 #define __P110  _PAGE_P(0)
126 #define __P111  _PAGE_P(0)
127 
128 #define __S000  _PAGE_S(_PAGE_FOE | _PAGE_FOW | _PAGE_FOR)
129 #define __S001  _PAGE_S(_PAGE_FOE | _PAGE_FOW)
130 #define __S010  _PAGE_S(_PAGE_FOE)
131 #define __S011  _PAGE_S(_PAGE_FOE)
132 #define __S100  _PAGE_S(_PAGE_FOW | _PAGE_FOR)
133 #define __S101  _PAGE_S(_PAGE_FOW)
134 #define __S110  _PAGE_S(0)
135 #define __S111  _PAGE_S(0)
136 
137 /*
138  * BAD_PAGETABLE is used when we need a bogus page-table, while
139  * BAD_PAGE is used for a bogus page.
140  *
141  * ZERO_PAGE is a global shared page that is always zero:  used
142  * for zero-mapped memory areas etc..
143  */
144 extern pte_t __bad_page(void);
145 extern pmd_t * __bad_pagetable(void);
146 
147 extern unsigned long __zero_page(void);
148 
149 #define BAD_PAGETABLE   __bad_pagetable()
150 #define BAD_PAGE        __bad_page()
151 #define ZERO_PAGE(vaddr)        (virt_to_page(ZERO_PGE))
152 
153 /* number of bits that fit into a memory pointer */
154 #define BITS_PER_PTR                    (8*sizeof(unsigned long))
155 
156 /* to align the pointer to a pointer address */
157 #define PTR_MASK                        (~(sizeof(void*)-1))
158 
159 /* sizeof(void*)==1<<SIZEOF_PTR_LOG2 */
160 #define SIZEOF_PTR_LOG2                 3
161 
162 /* to find an entry in a page-table */
163 #define PAGE_PTR(address)               \
164   ((unsigned long)(address)>>(PAGE_SHIFT-SIZEOF_PTR_LOG2)&PTR_MASK&~PAGE_MASK)
165 
166 /*
167  * On certain platforms whose physical address space can overlap KSEG,
168  * namely EV6 and above, we must re-twiddle the physaddr to restore the
169  * correct high-order bits.
170  *
171  * This is extremely confusing until you realize that this is actually
172  * just working around a userspace bug.  The X server was intending to
173  * provide the physical address but instead provided the KSEG address.
174  * Or tried to, except it's not representable.
175  * 
176  * On Tsunami there's nothing meaningful at 0x40000000000, so this is
177  * a safe thing to do.  Come the first core logic that does put something
178  * in this area -- memory or whathaveyou -- then this hack will have
179  * to go away.  So be prepared!
180  */
181 
182 #if defined(CONFIG_ALPHA_GENERIC) && defined(USE_48_BIT_KSEG)
183 #error "EV6-only feature in a generic kernel"
184 #endif
185 #if defined(CONFIG_ALPHA_GENERIC) || \
186     (defined(CONFIG_ALPHA_EV6) && !defined(USE_48_BIT_KSEG))
187 #define PHYS_TWIDDLE(phys) \
188   ((((phys) & 0xc0000000000UL) == 0x40000000000UL) \
189   ? ((phys) ^= 0xc0000000000UL) : (phys))
190 #else
191 #define PHYS_TWIDDLE(phys) (phys)
192 #endif
193 
194 /*
195  * Conversion functions:  convert a page and protection to a page entry,
196  * and a page entry and page directory to the page they refer to.
197  */
198 
199 #define mk_pte(page, pgprot)                                            \
200 ({                                                                      \
201         pte_t pte;                                                      \
202                                                                         \
203         pte_val(pte) = ((unsigned long)(page - mem_map) << 32) |        \
204                        pgprot_val(pgprot);                              \
205         pte;                                                            \
206 })
207 
208 extern inline pte_t mk_pte_phys(unsigned long physpage, pgprot_t pgprot)
209 { pte_t pte; pte_val(pte) = (PHYS_TWIDDLE(physpage) << (32-PAGE_SHIFT)) | (pgprot_val(pgprot) & ~_PAGE_MBE); return pte; }
210 
211 extern inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
212 { pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot); return pte; }
213 
214 extern inline void pmd_set(pmd_t * pmdp, pte_t * ptep)
215 { pmd_val(*pmdp) = _PAGE_TABLE | ((((unsigned long) ptep) - PAGE_OFFSET) << (32-PAGE_SHIFT)); }
216 
217 extern inline void pgd_set(pgd_t * pgdp, pmd_t * pmdp)
218 { pgd_val(*pgdp) = _PAGE_TABLE | ((((unsigned long) pmdp) - PAGE_OFFSET) << (32-PAGE_SHIFT)); }
219 
220 #define pte_page(x)     (mem_map+(unsigned long)((pte_val(x) >> 32)))
221 
222 extern inline unsigned long pmd_page(pmd_t pmd)
223 { return PAGE_OFFSET + ((pmd_val(pmd) & _PFN_MASK) >> (32-PAGE_SHIFT)); }
224 
225 extern inline unsigned long pgd_page(pgd_t pgd)
226 { return PAGE_OFFSET + ((pgd_val(pgd) & _PFN_MASK) >> (32-PAGE_SHIFT)); }
227 
228 extern inline int pte_none(pte_t pte)           { return !pte_val(pte); }
229 extern inline int pte_present(pte_t pte)        { return pte_val(pte) & _PAGE_VALID; }
230 extern inline void pte_clear(pte_t *ptep)       { pte_val(*ptep) = 0; }
231 
232 extern inline int pmd_none(pmd_t pmd)           { return !pmd_val(pmd); }
233 extern inline int pmd_bad(pmd_t pmd)            { return (pmd_val(pmd) & ~_PFN_MASK) != _PAGE_TABLE; }
234 extern inline int pmd_present(pmd_t pmd)        { return pmd_val(pmd) & _PAGE_VALID; }
235 extern inline void pmd_clear(pmd_t * pmdp)      { pmd_val(*pmdp) = 0; }
236 
237 extern inline int pgd_none(pgd_t pgd)           { return !pgd_val(pgd); }
238 extern inline int pgd_bad(pgd_t pgd)            { return (pgd_val(pgd) & ~_PFN_MASK) != _PAGE_TABLE; }
239 extern inline int pgd_present(pgd_t pgd)        { return pgd_val(pgd) & _PAGE_VALID; }
240 extern inline void pgd_clear(pgd_t * pgdp)      { pgd_val(*pgdp) = 0; }
241 
242 #define page_address(page)      ((page)->virtual)
243 
244 /*
245  * The following only work if pte_present() is true.
246  * Undefined behaviour if not..
247  */
248 extern inline int pte_read(pte_t pte)           { return !(pte_val(pte) & _PAGE_FOR); }
249 extern inline int pte_write(pte_t pte)          { return !(pte_val(pte) & _PAGE_FOW); }
250 extern inline int pte_exec(pte_t pte)           { return !(pte_val(pte) & _PAGE_FOE); }
251 extern inline int pte_dirty(pte_t pte)          { return pte_val(pte) & _PAGE_DIRTY; }
252 extern inline int pte_young(pte_t pte)          { return pte_val(pte) & _PAGE_ACCESSED; }
253 
254 extern inline pte_t pte_wrprotect(pte_t pte)    { pte_val(pte) |= _PAGE_FOW; return pte; }
255 extern inline pte_t pte_rdprotect(pte_t pte)    { pte_val(pte) |= _PAGE_FOR; return pte; }
256 extern inline pte_t pte_exprotect(pte_t pte)    { pte_val(pte) |= _PAGE_FOE; return pte; }
257 extern inline pte_t pte_mkclean(pte_t pte)      { pte_val(pte) &= ~(__DIRTY_BITS); return pte; }
258 extern inline pte_t pte_mkold(pte_t pte)        { pte_val(pte) &= ~(__ACCESS_BITS); return pte; }
259 extern inline pte_t pte_mkwrite(pte_t pte)      { pte_val(pte) &= ~_PAGE_FOW; return pte; }
260 extern inline pte_t pte_mkread(pte_t pte)       { pte_val(pte) &= ~_PAGE_FOR; return pte; }
261 extern inline pte_t pte_mkexec(pte_t pte)       { pte_val(pte) &= ~_PAGE_FOE; return pte; }
262 extern inline pte_t pte_mkdirty(pte_t pte)      { pte_val(pte) |= __DIRTY_BITS; return pte; }
263 extern inline pte_t pte_mkyoung(pte_t pte)      { pte_val(pte) |= __ACCESS_BITS; return pte; }
264 
265 #define PAGE_DIR_OFFSET(tsk,address) pgd_offset((tsk),(address))
266 
267 /* to find an entry in a kernel page-table-directory */
268 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
269 
270 /* to find an entry in a page-table-directory. */
271 #define pgd_index(address)      ((address >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
272 #define __pgd_offset(address)   pgd_index(address)
273 #define pgd_offset(mm, address) ((mm)->pgd+pgd_index(address))
274 
275 /* Find an entry in the second-level page table.. */
276 extern inline pmd_t * pmd_offset(pgd_t * dir, unsigned long address)
277 {
278         return (pmd_t *) pgd_page(*dir) + ((address >> PMD_SHIFT) & (PTRS_PER_PAGE - 1));
279 }
280 
281 /* Find an entry in the third-level page table.. */
282 extern inline pte_t * pte_offset(pmd_t * dir, unsigned long address)
283 {
284         return (pte_t *) pmd_page(*dir) + ((address >> PAGE_SHIFT) & (PTRS_PER_PAGE - 1));
285 }
286 
287 extern pgd_t swapper_pg_dir[1024];
288 
289 /*
290  * The Alpha doesn't have any external MMU info:  the kernel page
291  * tables contain all the necessary information.
292  */
293 extern inline void update_mmu_cache(struct vm_area_struct * vma,
294         unsigned long address, pte_t pte)
295 {
296 }
297 
298 /*
299  * Non-present pages:  high 24 bits are offset, next 8 bits type,
300  * low 32 bits zero.
301  */
302 extern inline pte_t mk_swap_pte(unsigned long type, unsigned long offset)
303 { pte_t pte; pte_val(pte) = (type << 32) | (offset << 40); return pte; }
304 
305 #define SWP_TYPE(x)                     (((x).val >> 32) & 0xff)
306 #define SWP_OFFSET(x)                   ((x).val >> 40)
307 #define SWP_ENTRY(type, offset)         ((swp_entry_t) { pte_val(mk_swap_pte((type),(offset))) })
308 #define pte_to_swp_entry(pte)           ((swp_entry_t) { pte_val(pte) })
309 #define swp_entry_to_pte(x)             ((pte_t) { (x).val })
310 
311 /* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
312 #define PageSkip(page)          (0)
313 #define kern_addr_valid(addr)   (1)
314 
315 #define io_remap_page_range(start, busaddr, size, prot) \
316         remap_page_range(start, virt_to_phys(__ioremap(busaddr)), size, prot)
317 
318 #define pte_ERROR(e) \
319         printk("%s:%d: bad pte %016lx.\n", __FILE__, __LINE__, pte_val(e))
320 #define pmd_ERROR(e) \
321         printk("%s:%d: bad pmd %016lx.\n", __FILE__, __LINE__, pmd_val(e))
322 #define pgd_ERROR(e) \
323         printk("%s:%d: bad pgd %016lx.\n", __FILE__, __LINE__, pgd_val(e))
324 
325 extern void paging_init(void);
326 
327 #include <asm-generic/pgtable.h>
328 
329 #endif /* _ALPHA_PGTABLE_H */
330 

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