1 #ifndef __ASM_ARM_DMA_H
2 #define __ASM_ARM_DMA_H
3
4 typedef unsigned int dmach_t;
5
6 #include <linux/config.h>
7 #include <linux/spinlock.h>
8 #include <asm/system.h>
9 #include <asm/memory.h>
10 #include <asm/scatterlist.h>
11 #include <asm/arch/dma.h>
12
13 /*
14 * DMA modes
15 */
16 typedef unsigned int dmamode_t;
17
18 #define DMA_MODE_MASK 3
19
20 #define DMA_MODE_READ 0
21 #define DMA_MODE_WRITE 1
22 #define DMA_MODE_CASCADE 2
23 #define DMA_AUTOINIT 4
24
25 extern spinlock_t dma_spin_lock;
26
27 extern __inline__ unsigned long claim_dma_lock(void)
28 {
29 unsigned long flags;
30 spin_lock_irqsave(&dma_spin_lock, flags);
31 return flags;
32 }
33
34 extern __inline__ void release_dma_lock(unsigned long flags)
35 {
36 spin_unlock_irqrestore(&dma_spin_lock, flags);
37 }
38
39 /* Clear the 'DMA Pointer Flip Flop'.
40 * Write 0 for LSB/MSB, 1 for MSB/LSB access.
41 */
42 #define clear_dma_ff(channel)
43
44 /* Set only the page register bits of the transfer address.
45 *
46 * NOTE: This is an architecture specific function, and should
47 * be hidden from the drivers
48 */
49 extern void set_dma_page(dmach_t channel, char pagenr);
50
51 /* Request a DMA channel
52 *
53 * Some architectures may need to do allocate an interrupt
54 */
55 extern int request_dma(dmach_t channel, const char * device_id);
56
57 /* Free a DMA channel
58 *
59 * Some architectures may need to do free an interrupt
60 */
61 extern void free_dma(dmach_t channel);
62
63 /* Enable DMA for this channel
64 *
65 * On some architectures, this may have other side effects like
66 * enabling an interrupt and setting the DMA registers.
67 */
68 extern void enable_dma(dmach_t channel);
69
70 /* Disable DMA for this channel
71 *
72 * On some architectures, this may have other side effects like
73 * disabling an interrupt or whatever.
74 */
75 extern void disable_dma(dmach_t channel);
76
77 /* Set the DMA scatter gather list for this channel
78 *
79 * This should not be called if a DMA channel is enabled,
80 * especially since some DMA architectures don't update the
81 * DMA address immediately, but defer it to the enable_dma().
82 */
83 extern void set_dma_sg(dmach_t channel, struct scatterlist *sg, int nr_sg);
84
85 /* Set the DMA address for this channel
86 *
87 * This should not be called if a DMA channel is enabled,
88 * especially since some DMA architectures don't update the
89 * DMA address immediately, but defer it to the enable_dma().
90 */
91 extern void set_dma_addr(dmach_t channel, unsigned long physaddr);
92
93 /* Set the DMA byte count for this channel
94 *
95 * This should not be called if a DMA channel is enabled,
96 * especially since some DMA architectures don't update the
97 * DMA count immediately, but defer it to the enable_dma().
98 */
99 extern void set_dma_count(dmach_t channel, unsigned long count);
100
101 /* Set the transfer direction for this channel
102 *
103 * This should not be called if a DMA channel is enabled,
104 * especially since some DMA architectures don't update the
105 * DMA transfer direction immediately, but defer it to the
106 * enable_dma().
107 */
108 extern void set_dma_mode(dmach_t channel, dmamode_t mode);
109
110 /* Set the transfer speed for this channel
111 */
112 extern void set_dma_speed(dmach_t channel, int cycle_ns);
113
114 /* Get DMA residue count. After a DMA transfer, this
115 * should return zero. Reading this while a DMA transfer is
116 * still in progress will return unpredictable results.
117 * If called before the channel has been used, it may return 1.
118 * Otherwise, it returns the number of _bytes_ left to transfer.
119 */
120 extern int get_dma_residue(dmach_t channel);
121
122 #ifndef NO_DMA
123 #define NO_DMA 255
124 #endif
125
126 #ifdef CONFIG_PCI
127 extern int isa_dma_bridge_buggy;
128 #else
129 #define isa_dma_bridge_buggy (0)
130 #endif
131
132 #endif /* _ARM_DMA_H */
133
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