1 /*
2 ** macints.h -- Macintosh Linux interrupt handling structs and prototypes
3 **
4 ** Copyright 1997 by Michael Schmitz
5 **
6 ** This file is subject to the terms and conditions of the GNU General Public
7 ** License. See the file COPYING in the main directory of this archive
8 ** for more details.
9 **
10 */
11
12 #ifndef _ASM_MACINTS_H_
13 #define _ASM_MACINTS_H_
14
15 #include <asm/irq.h>
16
17 /* Setting this prints debugging info for unclaimed interrupts */
18
19 #define DEBUG_SPURIOUS
20
21 /* Setting this prints debugging info on each autovector interrupt */
22
23 /* #define DEBUG_IRQS */
24
25 /* Setting this prints debugging info on each Nubus interrupt */
26
27 /* #define DEBUG_NUBUS_INT */
28
29 /* Setting this prints debugging info on irqs as they enabled and disabled. */
30
31 /* #define DEBUG_IRQUSE */
32
33 /*
34 * Base IRQ number for all Mac68K interrupt sources. Each source
35 * has eight indexes (base -> base+7).
36 */
37
38 #define VIA1_SOURCE_BASE 8
39 #define VIA2_SOURCE_BASE 16
40 #define MAC_SCC_SOURCE_BASE 24
41 #define PSC3_SOURCE_BASE 24
42 #define PSC4_SOURCE_BASE 32
43 #define PSC5_SOURCE_BASE 40
44 #define PSC6_SOURCE_BASE 48
45 #define NUBUS_SOURCE_BASE 56
46 #define BABOON_SOURCE_BASE 64
47
48 /*
49 * Maximum IRQ number is BABOON_SOURCE_BASE + 7,
50 * giving us IRQs up through 71
51 */
52
53 #define NUM_MAC_SOURCES 72
54
55 /*
56 * clean way to separate IRQ into its source and index
57 */
58
59 #define IRQ_SRC(irq) (irq >> 3)
60 #define IRQ_IDX(irq) (irq & 7)
61
62 #define IRQ_SPURIOUS (0)
63
64 /* auto-vector interrupts */
65 #define IRQ_AUTO_1 (1)
66 #define IRQ_AUTO_2 (2)
67 #define IRQ_AUTO_3 (3)
68 #define IRQ_AUTO_4 (4)
69 #define IRQ_AUTO_5 (5)
70 #define IRQ_AUTO_6 (6)
71 #define IRQ_AUTO_7 (7)
72
73 /* VIA1 interrupts */
74 #define IRQ_VIA1_0 (8) /* one second int. */
75 #define IRQ_VIA1_1 (9) /* VBlank int. */
76 #define IRQ_MAC_VBL IRQ_VIA1_1
77 #define IRQ_VIA1_2 (10) /* ADB SR shifts complete */
78 #define IRQ_MAC_ADB IRQ_VIA1_2
79 #define IRQ_MAC_ADB_SR IRQ_VIA1_2
80 #define IRQ_VIA1_3 (11) /* ADB SR CB2 ?? */
81 #define IRQ_MAC_ADB_SD IRQ_VIA1_3
82 #define IRQ_VIA1_4 (12) /* ADB SR ext. clock pulse */
83 #define IRQ_MAC_ADB_CL IRQ_VIA1_4
84 #define IRQ_VIA1_5 (13)
85 #define IRQ_MAC_TIMER_2 IRQ_VIA1_5
86 #define IRQ_VIA1_6 (14)
87 #define IRQ_MAC_TIMER_1 IRQ_VIA1_6
88 #define IRQ_VIA1_7 (15)
89
90 /* VIA2/RBV interrupts */
91 #define IRQ_VIA2_0 (16)
92 #define IRQ_MAC_SCSIDRQ IRQ_VIA2_0
93 #define IRQ_VIA2_1 (17)
94 #define IRQ_MAC_NUBUS IRQ_VIA2_1
95 #define IRQ_VIA2_2 (18)
96 #define IRQ_VIA2_3 (19)
97 #define IRQ_MAC_SCSI IRQ_VIA2_3
98 #define IRQ_VIA2_4 (20)
99 #define IRQ_VIA2_5 (21)
100 #define IRQ_VIA2_6 (22)
101 #define IRQ_VIA2_7 (23)
102
103 /* Level 3 (PSC, AV Macs only) interrupts */
104 #define IRQ_PSC3_0 (24)
105 #define IRQ_MAC_MACE IRQ_PSC3_0
106 #define IRQ_PSC3_1 (25)
107 #define IRQ_PSC3_2 (26)
108 #define IRQ_PSC3_3 (27)
109
110 /* Level 4 (SCC) interrupts */
111 #define IRQ_SCC (32)
112 #define IRQ_SCCA (33)
113 #define IRQ_SCCB (34)
114 #if 0 /* FIXME: are there multiple interrupt conditions on the SCC ?? */
115 /* SCC interrupts */
116 #define IRQ_SCCB_TX (32)
117 #define IRQ_SCCB_STAT (33)
118 #define IRQ_SCCB_RX (34)
119 #define IRQ_SCCB_SPCOND (35)
120 #define IRQ_SCCA_TX (36)
121 #define IRQ_SCCA_STAT (37)
122 #define IRQ_SCCA_RX (38)
123 #define IRQ_SCCA_SPCOND (39)
124 #endif
125
126 /* Level 4 (PSC, AV Macs only) interrupts */
127 #define IRQ_PSC4_0 (32)
128 #define IRQ_PSC4_1 (33)
129 #define IRQ_PSC4_2 (34)
130 #define IRQ_PSC4_3 (35)
131 #define IRQ_MAC_MACE_DMA IRQ_PSC4_3
132
133 /* Level 5 (PSC, AV Macs only) interrupts */
134 #define IRQ_PSC5_0 (40)
135 #define IRQ_PSC5_1 (41)
136 #define IRQ_PSC5_2 (42)
137 #define IRQ_PSC5_3 (43)
138
139 /* Level 6 (PSC, AV Macs only) interrupts */
140 #define IRQ_PSC6_0 (48)
141 #define IRQ_PSC6_1 (49)
142 #define IRQ_PSC6_2 (50)
143 #define IRQ_PSC6_3 (51)
144
145 /* Nubus interrupts (cascaded to VIA2) */
146 #define IRQ_NUBUS_9 (56)
147 #define IRQ_NUBUS_A (57)
148 #define IRQ_NUBUS_B (58)
149 #define IRQ_NUBUS_C (59)
150 #define IRQ_NUBUS_D (60)
151 #define IRQ_NUBUS_E (61)
152 #define IRQ_NUBUS_F (62)
153
154 /* Baboon interrupts (cascaded to nubus slot $C) */
155 #define IRQ_BABOON_0 (64)
156 #define IRQ_BABOON_1 (65)
157 #define IRQ_BABOON_2 (66)
158 #define IRQ_BABOON_3 (67)
159
160 #define SLOT2IRQ(x) (x + 47)
161 #define IRQ2SLOT(x) (x - 47)
162
163 #define INT_CLK 24576 /* CLK while int_clk =2.456MHz and divide = 100 */
164 #define INT_TICKS 246 /* to make sched_time = 99.902... HZ */
165
166 extern irq_node_t *mac_irq_list[NUM_MAC_SOURCES];
167 extern void mac_do_irq_list(int irq, struct pt_regs *);
168
169 #endif /* asm/macints.h */
170
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