1 /*
2 * Helpfile for jazzdma.c -- Mips Jazz R4030 DMA controller support
3 *
4 * $Id:$
5 */
6 #ifndef __ASM_MIPS_JAZZDMA_H
7 #define __ASM_MIPS_JAZZDMA_H
8
9 /*
10 * Prototypes and macros
11 */
12 unsigned long vdma_init(unsigned long memory_start, unsigned long memory_end);
13 unsigned long vdma_alloc(unsigned long paddr, unsigned long size);
14 int vdma_free(unsigned long laddr);
15 int vdma_remap(unsigned long laddr, unsigned long paddr, unsigned long size);
16 unsigned long vdma_phys2log(unsigned long paddr);
17 unsigned long vdma_log2phys(unsigned long laddr);
18 void vdma_stats(void); /* for debugging only */
19
20 void vdma_enable(int channel);
21 void vdma_disable(int channel);
22 void vdma_set_mode(int channel, int mode);
23 void vdma_set_addr(int channel, long addr);
24 void vdma_set_count(int channel, int count);
25 int vdma_get_residue(int channel);
26 int vdma_get_enable(int channel);
27
28 /*
29 * some definitions used by the driver functions
30 */
31 #define VDMA_PAGESIZE 4096
32 #define VDMA_PGTBL_ENTRIES 4096
33 #define VDMA_PGTBL_SIZE (sizeof(VDMA_PGTBL_ENTRY) * VDMA_PGTBL_ENTRIES)
34 #define VDMA_PAGE_EMPTY 0xff000000
35
36 /*
37 * Macros to get page no. and offset of a given address
38 * Note that VDMA_PAGE() works for physical addresses only
39 */
40 #define VDMA_PAGE(a) ((unsigned int)(a) >> 12)
41 #define VDMA_OFFSET(a) ((unsigned int)(a) & (VDMA_PAGESIZE-1))
42
43 /*
44 * error code returned by vdma_alloc()
45 * (See also arch/mips/kernel/jazzdma.c)
46 */
47 #define VDMA_ERROR 0xffffffff
48
49 /*
50 * VDMA pagetable entry description
51 */
52 typedef volatile struct VDMA_PGTBL_ENTRY
53 {
54 unsigned int frame; /* physical frame no. */
55 unsigned int owner; /* owner of this entry (0=free) */
56 } VDMA_PGTBL_ENTRY;
57
58
59 /*
60 * DMA channel control registers
61 * in the R4030 MCT_ADR chip
62 */
63 #define JAZZ_R4030_CHNL_MODE 0xE0000100 /* 8 DMA Channel Mode Registers, */
64 /* 0xE0000100,120,140... */
65 #define JAZZ_R4030_CHNL_ENABLE 0xE0000108 /* 8 DMA Channel Enable Regs, */
66 /* 0xE0000108,128,148... */
67 #define JAZZ_R4030_CHNL_COUNT 0xE0000110 /* 8 DMA Channel Byte Cnt Regs, */
68 /* 0xE0000110,130,150... */
69 #define JAZZ_R4030_CHNL_ADDR 0xE0000118 /* 8 DMA Channel Address Regs, */
70 /* 0xE0000118,138,158... */
71
72 /* channel enable register bits */
73
74 #define R4030_CHNL_ENABLE (1<<0)
75 #define R4030_CHNL_WRITE (1<<1)
76 #define R4030_TC_INTR (1<<8)
77 #define R4030_MEM_INTR (1<<9)
78 #define R4030_ADDR_INTR (1<<10)
79
80 /*
81 * Channel mode register bits
82 */
83 #define R4030_MODE_ATIME_40 (0) /* device access time on remote bus */
84 #define R4030_MODE_ATIME_80 (1)
85 #define R4030_MODE_ATIME_120 (2)
86 #define R4030_MODE_ATIME_160 (3)
87 #define R4030_MODE_ATIME_200 (4)
88 #define R4030_MODE_ATIME_240 (5)
89 #define R4030_MODE_ATIME_280 (6)
90 #define R4030_MODE_ATIME_320 (7)
91 #define R4030_MODE_WIDTH_8 (1<<3) /* device data bus width */
92 #define R4030_MODE_WIDTH_16 (2<<3)
93 #define R4030_MODE_WIDTH_32 (3<<3)
94 #define R4030_MODE_INTR_EN (1<<5)
95 #define R4030_MODE_BURST (1<<6) /* Rev. 2 only */
96 #define R4030_MODE_FAST_ACK (1<<7) /* Rev. 2 only */
97
98 #endif /* __ASM_MIPS_JAZZDMA_H */
99
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