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Linux Cross Reference
Linux/include/asm-mips64/processor.h

Version: ~ [ 2.4.0 ] ~
Architecture: ~ [ i386 ] ~ [ alpha ] ~ [ m68k ] ~ [ mips ] ~ [ ppc ] ~ [ sparc ] ~ [ sparc64 ] ~

  1 /*
  2  * This file is subject to the terms and conditions of the GNU General Public
  3  * License.  See the file "COPYING" in the main directory of this archive
  4  * for more details.
  5  *
  6  * Copyright (C) 1994 Waldorf GMBH
  7  * Copyright (C) 1995, 1996, 1997, 1998, 1999, 2000 Ralf Baechle
  8  * Modified further for R[236]000 compatibility by Paul M. Antoine
  9  * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
 10  */
 11 #ifndef _ASM_PROCESSOR_H
 12 #define _ASM_PROCESSOR_H
 13 
 14 #include <linux/config.h>
 15 
 16 /*
 17  * Return current * instruction pointer ("program counter").
 18  *
 19  * Two implementations.  The ``la'' version results in shorter code for
 20  * the kernel which we assume to reside in the 32-bit compat address space.
 21  * The  ``jal'' version is for use by modules which live in outer space.
 22  * This is just a single instruction unlike the long dla macro expansion.
 23  */
 24 #ifdef MODULE
 25 #define current_text_addr()                                             \
 26 ({                                                                      \
 27         void *_a;                                                       \
 28                                                                         \
 29         __asm__ ("jal\t1f, 1f\n\t"                                      \
 30                 "1:"                                                    \
 31                 : "=r" (_a));                                           \
 32                                                                         \
 33         _a;                                                             \
 34 })
 35 #else
 36 #define current_text_addr()                                             \
 37 ({                                                                      \
 38         void *_a;                                                       \
 39                                                                         \
 40         __asm__ ("dla\t%0, 1f\n\t"                                      \
 41                 "1:"                                                    \
 42                 : "=r" (_a));                                           \
 43                                                                         \
 44         _a;                                                             \
 45 })
 46 #endif
 47 
 48 #if !defined (_LANGUAGE_ASSEMBLY)
 49 #include <asm/cachectl.h>
 50 #include <asm/mipsregs.h>
 51 #include <asm/reg.h>
 52 #include <asm/system.h>
 53 
 54 #if (defined(CONFIG_SGI_IP27))
 55 #include <asm/sn/types.h>
 56 #include <asm/sn/intr_public.h>
 57 #endif
 58 
 59 struct cpuinfo_mips {
 60         unsigned long udelay_val;
 61         unsigned long *pgd_quick;
 62         unsigned long *pmd_quick;
 63         unsigned long *pte_quick;
 64         unsigned long pgtable_cache_sz;
 65         unsigned long last_asn;
 66         unsigned long asid_cache;
 67 #if defined(CONFIG_SGI_IP27)
 68         cpuid_t         p_cpuid;        /* PROM assigned cpuid */
 69         cnodeid_t       p_nodeid;       /* my node ID in compact-id-space */
 70         nasid_t         p_nasid;        /* my node ID in numa-as-id-space */
 71         unsigned char   p_slice;        /* Physical position on node board */
 72         hub_intmasks_t  p_intmasks;     /* SN0 per-CPU interrupt masks */
 73 #endif
 74 } __attribute__((aligned(128)));
 75 
 76 /*
 77  * System setup and hardware flags..
 78  * XXX: Should go into mips_cpuinfo.
 79  */
 80 extern char wait_available;             /* only available on R4[26]00 */
 81 extern char cyclecounter_available;     /* only available from R4000 upwards. */
 82 extern char dedicated_iv_available;     /* some embedded MIPS like Nevada */
 83 extern char vce_available;              /* Supports VCED / VCEI exceptions */
 84 extern char mips4_available;            /* CPU has MIPS IV ISA or better */
 85 
 86 extern unsigned int vced_count, vcei_count;
 87 extern struct cpuinfo_mips cpu_data[];
 88 
 89 #ifdef CONFIG_SMP
 90 #define current_cpu_data cpu_data[smp_processor_id()]
 91 #else
 92 #define current_cpu_data cpu_data[0]
 93 #endif
 94 
 95 /*
 96  * Bus types (default is ISA, but people can check others with these..)
 97  * MCA_bus hardcoded to 0 for now.
 98  *
 99  * This needs to be extended since MIPS systems are being delivered with
100  * numerous different types of bus systems.
101  */
102 extern int EISA_bus;
103 #define MCA_bus 0
104 #define MCA_bus__is_a_macro /* for versions in ksyms.c */
105 
106 /*
107  * MIPS has no problems with write protection
108  */
109 #define wp_works_ok 1
110 #define wp_works_ok__is_a_macro /* for versions in ksyms.c */
111 
112 /* Lazy FPU handling on uni-processor */
113 extern struct task_struct *last_task_used_math;
114 
115 #ifndef CONFIG_SMP
116 #define IS_FPU_OWNER()          (last_task_used_math == current)
117 #define CLEAR_FPU_OWNER()       last_task_used_math = NULL;
118 #else
119 #define IS_FPU_OWNER()          (current->flags & PF_USEDFPU)
120 #define CLEAR_FPU_OWNER()       current->flags &= ~PF_USEDFPU;
121 #endif
122 
123 /*
124  * User space process size: 1TB. This is hardcoded into a few places,
125  * so don't change it unless you know what you are doing.  TASK_SIZE
126  * is limited to 1TB by the R4000 architecture; R10000 and better can
127  * support 16TB.
128  */
129 #define TASK_SIZE32        0x80000000UL
130 #define TASK_SIZE       0x10000000000UL
131 
132 /* This decides where the kernel will search for a free chunk of vm
133  * space during mmap's.
134  */
135 #define TASK_UNMAPPED_BASE      ((current->thread.mflags & MF_32BIT) ? \
136         (TASK_SIZE32 / 3) : (TASK_SIZE / 3))
137 
138 /*
139  * Size of io_bitmap in longwords: 32 is ports 0-0x3ff.
140  */
141 #define IO_BITMAP_SIZE  32
142 
143 #define NUM_FPU_REGS    32
144 
145 struct mips_fpu_hard_struct {
146         unsigned long fp_regs[NUM_FPU_REGS];
147         unsigned int control;
148 };
149 
150 /*
151  * FIXME: no fpu emulator yet (but who cares anyway?)
152  */
153 struct mips_fpu_soft_struct {
154         long    dummy;
155 };
156 
157 union mips_fpu_union {
158         struct mips_fpu_hard_struct hard;
159         struct mips_fpu_soft_struct soft;
160 };
161 
162 #define INIT_FPU { \
163         {{0,},} \
164 }
165 
166 typedef struct {
167         unsigned long seg;
168 } mm_segment_t;
169 
170 /*
171  * If you change thread_struct remember to change the #defines below too!
172  */
173 struct thread_struct {
174         /* Saved main processor registers. */
175         unsigned long reg16;
176         unsigned long reg17, reg18, reg19, reg20, reg21, reg22, reg23;
177         unsigned long reg29, reg30, reg31;
178 
179         /* Saved cp0 stuff. */
180         unsigned long cp0_status;
181 
182         /* Saved fpu/fpu emulator stuff. */
183         union mips_fpu_union fpu;
184 
185         /* Other stuff associated with the thread. */
186         unsigned long cp0_badvaddr;     /* Last user fault */
187         unsigned long cp0_baduaddr;     /* Last kernel fault accessing USEG */
188         unsigned long error_code;
189         unsigned long trap_no;
190 #define MF_FIXADE 1                     /* Fix address errors in software */
191 #define MF_LOGADE 2                     /* Log address errors to syslog */
192 #define MF_32BIT  4                     /* Process is in 32-bit compat mode */
193         unsigned long mflags;
194         mm_segment_t current_ds;
195         unsigned long irix_trampoline;  /* Wheee... */
196         unsigned long irix_oldctx;
197 };
198 
199 #endif /* !defined (_LANGUAGE_ASSEMBLY) */
200 
201 #define INIT_MMAP { &init_mm, KSEG0, KSEG1, NULL, PAGE_SHARED, \
202                     VM_READ | VM_WRITE | VM_EXEC, 1, NULL, NULL }
203 
204 #define INIT_THREAD  { \
205         /* \
206          * saved main processor registers \
207          */ \
208         0, 0, 0, 0, 0, 0, 0, 0, \
209                        0, 0, 0, \
210         /* \
211          * saved cp0 stuff \
212          */ \
213         0, \
214         /* \
215          * saved fpu/fpu emulator stuff \
216          */ \
217         INIT_FPU, \
218         /* \
219          * Other stuff associated with the process \
220          */ \
221         0, 0, 0, 0, \
222         /* \
223          * For now the default is to fix address errors \
224          */ \
225         MF_FIXADE, { 0 }, 0, 0 \
226 }
227 
228 #ifdef __KERNEL__
229 
230 #define KERNEL_STACK_SIZE 0x4000
231 
232 #if !defined (_LANGUAGE_ASSEMBLY)
233 
234 /* Free all resources held by a thread. */
235 #define release_thread(thread) do { } while(0)
236 
237 extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
238 
239 /* Copy and release all segment info associated with a VM */
240 #define copy_segments(p, mm) do { } while(0)
241 #define release_segments(mm) do { } while(0)
242 
243 /*
244  * Return saved PC of a blocked thread.
245  */
246 extern inline unsigned long thread_saved_pc(struct thread_struct *t)
247 {
248         extern void ret_from_sys_call(void);
249 
250         /* New born processes are a special case */
251         if (t->reg31 == (unsigned long) ret_from_sys_call)
252                 return t->reg31;
253 
254         return ((unsigned long*)t->reg29)[11];
255 }
256 
257 #define user_mode(regs) (((regs)->cp0_status & ST0_KSU) == KSU_USER)
258 
259 /*
260  * Do necessary setup to start up a newly executed thread.
261  */
262 #define start_thread(regs, pc, sp)                                      \
263 do {                                                                    \
264         unsigned long __status;                                         \
265                                                                         \
266         /* New thread looses kernel privileges. */                      \
267         __status = regs->cp0_status & ~(ST0_CU0|ST0_FR|ST0_KSU);        \
268         __status |= KSU_USER;                                           \
269         __status |= (current->thread.mflags & MF_32BIT) ? 0 : ST0_FR;   \
270         regs->cp0_status = __status;                                    \
271         regs->cp0_epc = pc;                                             \
272         regs->regs[29] = sp;                                            \
273         current->thread.current_ds = USER_DS;                           \
274 } while(0)
275 
276 unsigned long get_wchan(struct task_struct *p);
277 
278 #define __PT_REG(reg) ((long)&((struct pt_regs *)0)->reg - sizeof(struct pt_regs))
279 #define __KSTK_TOS(tsk) ((unsigned long)(tsk) + KERNEL_STACK_SIZE - 32)
280 #define KSTK_EIP(tsk) (*(unsigned long *)(__KSTK_TOS(tsk) + __PT_REG(cp0_epc)))
281 #define KSTK_ESP(tsk) (*(unsigned long *)(__KSTK_TOS(tsk) + __PT_REG(regs[29])))
282 
283 /* Allocation and freeing of basic task resources. */
284 /*
285  * NOTE! The task struct and the stack go together
286  */
287 #define THREAD_SIZE (2*PAGE_SIZE)
288 #define alloc_task_struct() \
289         ((struct task_struct *) __get_free_pages(GFP_KERNEL, 2))
290 #define free_task_struct(p)     free_pages((unsigned long)(p), 2)
291 #define get_task_struct(tsk)    atomic_inc(&virt_to_page(tsk)->count)
292 
293 #define init_task       (init_task_union.task)
294 #define init_stack      (init_task_union.stack)
295 
296 #endif /* !defined (_LANGUAGE_ASSEMBLY) */
297 #endif /* __KERNEL__ */
298 
299 /*
300  * Return_address is a replacement for __builtin_return_address(count)
301  * which on certain architectures cannot reasonably be implemented in GCC
302  * (MIPS, Alpha) or is unuseable with -fomit-frame-pointer (i386).
303  * Note that __builtin_return_address(x>=1) is forbidden because GCC
304  * aborts compilation on some CPUs.  It's simply not possible to unwind
305  * some CPU's stackframes.
306  *
307  * In gcc 2.8 and newer  __builtin_return_address works only for non-leaf
308  * functions.  We avoid the overhead of a function call by forcing the
309  * compiler to save the return address register on the stack.
310  */
311 #define return_address() ({__asm__ __volatile__("":::"$31");__builtin_return_address(0);})
312 
313 #endif /* _ASM_PROCESSOR_H */
314 

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