1 /*
2 ** This file is private to iosapic driver.
3 ** If stuff needs to be used by another driver, move it to a common file.
4 **
5 ** WARNING: fields most data structures here are ordered to make sure
6 ** they pack nicely for 64-bit compilation. (ie sizeof(long) == 8)
7 */
8
9
10 /*
11 ** I/O SAPIC init function
12 ** Caller knows where an I/O SAPIC is. LBA has an integrated I/O SAPIC.
13 ** Call setup as part of per instance initialization.
14 ** (ie *not* init_module() function unless only one is present.)
15 ** fixup_irq is to initialize PCI IRQ line support and
16 ** virtualize pcidev->irq value. To be called by pci_fixup_bus().
17 */
18 extern void *iosapic_register(void *hpa);
19 extern int iosapic_fixup_irq(void *obj, struct pci_dev *pcidev);
20
21
22 #ifdef __IA64__
23 /*
24 ** PA: PIB (Processor Interrupt Block) is handled by Runway bus adapter.
25 ** and is hardcoded to 0xfeeNNNN0 where NNNN is id_eid field.
26 **
27 ** IA64: PIB is handled by "Local SAPIC" (integrated in the processor).
28 */
29 struct local_sapic_info {
30 struct local_sapic_info *lsi_next; /* point to next CPU info */
31 int *lsi_cpu_id; /* point to logical CPU id */
32 unsigned long *lsi_id_eid; /* point to IA-64 CPU id */
33 int *lsi_status; /* point to CPU status */
34 void *lsi_private; /* point to special info */
35 };
36
37 /*
38 ** "root" data structure which ties everything together.
39 ** Should always be able to start with sapic_root and locate
40 ** the desired information.
41 */
42 struct sapic_info {
43 struct sapic_info *si_next; /* info is per cell */
44 int si_cellid; /* cell id */
45 unsigned int si_status; /* status */
46 char *si_pib_base; /* intr blk base address */
47 local_sapic_info_t *si_local_info;
48 io_sapic_info_t *si_io_info;
49 extint_info_t *si_extint_info;/* External Intr info */
50 };
51
52 #endif /* IA64 */
53
54
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