1 /*
2 * PowerPC atomic operations
3 */
4
5 #ifndef _ASM_PPC_ATOMIC_H_
6 #define _ASM_PPC_ATOMIC_H_
7
8 typedef struct { volatile int counter; } atomic_t;
9
10 #define ATOMIC_INIT(i) { (i) }
11
12 #define atomic_read(v) ((v)->counter)
13 #define atomic_set(v,i) (((v)->counter) = (i))
14
15 extern void atomic_clear_mask(unsigned long mask, unsigned long *addr);
16 extern void atomic_set_mask(unsigned long mask, unsigned long *addr);
17
18 static __inline__ int atomic_add_return(int a, atomic_t *v)
19 {
20 int t;
21
22 __asm__ __volatile__("\n\
23 1: lwarx %0,0,%3\n\
24 add %0,%2,%0\n\
25 stwcx. %0,0,%3\n\
26 bne- 1b"
27 : "=&r" (t), "=m" (v->counter)
28 : "r" (a), "r" (v), "m" (v->counter)
29 : "cc");
30
31 return t;
32 }
33
34 static __inline__ int atomic_sub_return(int a, atomic_t *v)
35 {
36 int t;
37
38 __asm__ __volatile__("\n\
39 1: lwarx %0,0,%3\n\
40 subf %0,%2,%0\n\
41 stwcx. %0,0,%3\n\
42 bne- 1b"
43 : "=&r" (t), "=m" (v->counter)
44 : "r" (a), "r" (v), "m" (v->counter)
45 : "cc");
46
47 return t;
48 }
49
50 static __inline__ int atomic_inc_return(atomic_t *v)
51 {
52 int t;
53
54 __asm__ __volatile__("\n\
55 1: lwarx %0,0,%2\n\
56 addic %0,%0,1\n\
57 stwcx. %0,0,%2\n\
58 bne- 1b"
59 : "=&r" (t), "=m" (v->counter)
60 : "r" (v), "m" (v->counter)
61 : "cc");
62
63 return t;
64 }
65
66 static __inline__ int atomic_dec_return(atomic_t *v)
67 {
68 int t;
69
70 __asm__ __volatile__("\n\
71 1: lwarx %0,0,%2\n\
72 addic %0,%0,-1\n\
73 stwcx. %0,0,%2\n\
74 bne 1b"
75 : "=&r" (t), "=m" (v->counter)
76 : "r" (v), "m" (v->counter)
77 : "cc");
78
79 return t;
80 }
81
82 #define atomic_add(a, v) ((void) atomic_add_return((a), (v)))
83 #define atomic_sub(a, v) ((void) atomic_sub_return((a), (v)))
84 #define atomic_sub_and_test(a, v) (atomic_sub_return((a), (v)) == 0)
85 #define atomic_inc(v) ((void) atomic_inc_return((v)))
86 #define atomic_dec(v) ((void) atomic_dec_return((v)))
87 #define atomic_dec_and_test(v) (atomic_dec_return((v)) == 0)
88
89 #endif /* _ASM_PPC_ATOMIC_H_ */
90
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