1 /*
2 * arch/s390/kernel/s390io.h
3 *
4 * S390 version
5 * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
6 * Author(s): Ingo Adlung (adlung@de.ibm.com)
7 */
8
9 #ifndef __irq_h
10 #define __irq_h
11
12 #include <linux/config.h>
13 #include <asm/hardirq.h>
14
15 /*
16 * How many IRQ's for S390 ?!?
17 */
18 #define __MAX_SUBCHANNELS 65536
19 #define NR_IRQS __MAX_SUBCHANNELS
20
21 #define INVALID_STORAGE_AREA ((void *)(-1 - 0x3FFF ))
22
23 extern int disable_irq(unsigned int);
24 extern int enable_irq(unsigned int);
25
26 /*
27 * Interrupt controller descriptor. This is all we need
28 * to describe about the low-level hardware.
29 */
30 struct hw_interrupt_type {
31 const __u8 *typename;
32 int (*handle)(unsigned int irq,
33 int cpu,
34 struct pt_regs * regs);
35 int (*enable) (unsigned int irq);
36 int (*disable)(unsigned int irq);
37 };
38
39 /*
40 * Status: reason for being disabled: somebody has
41 * done a "disable_irq()" or we must not re-enter the
42 * already executing irq..
43 */
44 #define IRQ_INPROGRESS 1
45 #define IRQ_DISABLED 2
46 #define IRQ_PENDING 4
47
48 /*
49 * path management control word
50 */
51 typedef struct {
52 __u32 intparm; /* interruption parameter */
53 __u32 res0 : 2; /* reserved zeros */
54 __u32 isc : 3; /* interruption sublass */
55 __u32 res5 : 3; /* reserved zeros */
56 __u32 ena : 1; /* enabled */
57 __u32 lm : 2; /* limit mode */
58 __u32 mme : 2; /* measurement-mode enable */
59 __u32 mp : 1; /* multipath mode */
60 __u32 tf : 1; /* timing facility */
61 __u32 dnv : 1; /* device number valid */
62 __u32 dev : 16; /* device number */
63 __u8 lpm; /* logical path mask */
64 __u8 pnom; /* path not operational mask */
65 __u8 lpum; /* last path used mask */
66 __u8 pim; /* path installed mask */
67 __u16 mbi; /* measurement-block index */
68 __u8 pom; /* path operational mask */
69 __u8 pam; /* path available mask */
70 __u8 chpid[8]; /* CHPID 0-7 (if available) */
71 __u32 unused1 : 8; /* reserved zeros */
72 __u32 st : 3; /* subchannel type */
73 __u32 unused2 : 20; /* reserved zeros */
74 __u32 csense : 1; /* concurrent sense; can be enabled ...*/
75 /* ... per MSCH, however, if facility */
76 /* ... is not installed, this results */
77 /* ... in an operand exception. */
78 } __attribute__ ((packed)) pmcw_t;
79
80 /*
81 * subchannel status word
82 */
83 typedef struct {
84 __u32 key : 4; /* subchannel key */
85 __u32 sctl : 1; /* suspend control */
86 __u32 eswf : 1; /* ESW format */
87 __u32 cc : 2; /* deferred condition code */
88 __u32 fmt : 1; /* format */
89 __u32 pfch : 1; /* prefetch */
90 __u32 isic : 1; /* initial-status interruption control */
91 __u32 alcc : 1; /* address-limit checking control */
92 __u32 ssi : 1; /* supress-suspended interruption */
93 __u32 zcc : 1; /* zero condition code */
94 __u32 ectl : 1; /* extended control */
95 __u32 pno : 1; /* path not operational */
96 __u32 res : 1; /* reserved */
97 __u32 fctl : 3; /* function control */
98 __u32 actl : 7; /* activity control */
99 __u32 stctl : 5; /* status control */
100 __u32 cpa; /* channel program address */
101 __u32 dstat : 8; /* device status */
102 __u32 cstat : 8; /* subchannel status */
103 __u32 count : 16; /* residual count */
104 } __attribute__ ((packed)) scsw_t;
105
106 #define SCSW_FCTL_CLEAR_FUNC 0x1
107 #define SCSW_FCTL_HALT_FUNC 0x2
108 #define SCSW_FCTL_START_FUNC 0x4
109
110 #define SCSW_ACTL_SUSPENDED 0x1
111 #define SCSW_ACTL_DEVACT 0x2
112 #define SCSW_ACTL_SCHACT 0x4
113 #define SCSW_ACTL_CLEAR_PEND 0x8
114 #define SCSW_ACTL_HALT_PEND 0x10
115 #define SCSW_ACTL_START_PEND 0x20
116 #define SCSW_ACTL_RESUME_PEND 0x40
117
118 #define SCSW_STCTL_STATUS_PEND 0x1
119 #define SCSW_STCTL_SEC_STATUS 0x2
120 #define SCSW_STCTL_PRIM_STATUS 0x4
121 #define SCSW_STCTL_INTER_STATUS 0x8
122 #define SCSW_STCTL_ALERT_STATUS 0x10
123
124 #define DEV_STAT_ATTENTION 0x80
125 #define DEV_STAT_STAT_MOD 0x40
126 #define DEV_STAT_CU_END 0x20
127 #define DEV_STAT_BUSY 0x10
128 #define DEV_STAT_CHN_END 0x08
129 #define DEV_STAT_DEV_END 0x04
130 #define DEV_STAT_UNIT_CHECK 0x02
131 #define DEV_STAT_UNIT_EXCEP 0x01
132
133 #define SCHN_STAT_PCI 0x80
134 #define SCHN_STAT_INCORR_LEN 0x40
135 #define SCHN_STAT_PROG_CHECK 0x20
136 #define SCHN_STAT_PROT_CHECK 0x10
137 #define SCHN_STAT_CHN_DATA_CHK 0x08
138 #define SCHN_STAT_CHN_CTRL_CHK 0x04
139 #define SCHN_STAT_INTF_CTRL_CHK 0x02
140 #define SCHN_STAT_CHAIN_CHECK 0x01
141
142 /*
143 * subchannel information block
144 */
145 typedef struct {
146 pmcw_t pmcw; /* path management control word */
147 scsw_t scsw; /* subchannel status word */
148 __u8 mda[12]; /* model dependent area */
149 } __attribute__ ((packed,aligned(4))) schib_t;
150
151 typedef struct {
152 __u8 cmd_code;/* command code */
153 __u8 flags; /* flags, like IDA adressing, etc. */
154 __u16 count; /* byte count */
155 __u32 cda; /* data address */
156 } ccw1_t __attribute__ ((packed,aligned(8)));
157
158 #define CCW_FLAG_DC 0x80
159 #define CCW_FLAG_CC 0x40
160 #define CCW_FLAG_SLI 0x20
161 #define CCW_FLAG_SKIP 0x10
162 #define CCW_FLAG_PCI 0x08
163 #define CCW_FLAG_IDA 0x04
164 #define CCW_FLAG_SUSPEND 0x02
165
166 #define CCW_CMD_READ_IPL 0x02
167 #define CCW_CMD_NOOP 0x03
168 #define CCW_CMD_BASIC_SENSE 0x04
169 #define CCW_CMD_TIC 0x08
170 #define CCW_CMD_SENSE_PGID 0x34
171 #define CCW_CMD_RDC 0x64
172 #define CCW_CMD_SET_PGID 0xAF
173 #define CCW_CMD_SENSE_ID 0xE4
174
175 #define SENSE_MAX_COUNT 0x20
176
177 /*
178 * architectured values for first sense byte
179 */
180 #define SNS0_CMD_REJECT 0x80
181 #define SNS_CMD_REJECT SNS0_CMD_REJECT
182 #define SNS0_INTERVENTION_REQ 0x40
183 #define SNS0_BUS_OUT_CHECK 0x20
184 #define SNS0_EQUIPMENT_CHECK 0x10
185 #define SNS0_DATA_CHECK 0x08
186 #define SNS0_OVERRUN 0x04
187
188 /*
189 * operation request block
190 */
191 typedef struct {
192 __u32 intparm; /* interruption parameter */
193 __u32 key : 4; /* flags, like key, suspend control, etc. */
194 __u32 spnd : 1; /* suspend control */
195 __u32 res1 : 3; /* reserved */
196 __u32 fmt : 1; /* format control */
197 __u32 pfch : 1; /* prefetch control */
198 __u32 isic : 1; /* initial-status-interruption control */
199 __u32 alcc : 1; /* address-limit-checking control */
200 __u32 ssic : 1; /* suppress-suspended-interr. control */
201 __u32 res2 : 3; /* reserved */
202 __u32 lpm : 8; /* logical path mask */
203 __u32 ils : 1; /* incorrect length */
204 __u32 zero : 7; /* reserved zeros */
205 __u32 cpa; /* channel program address */
206 } __attribute__ ((packed,aligned(4))) orb_t;
207
208 typedef struct {
209 __u32 res0 : 4; /* reserved */
210 __u32 pvrf : 1; /* path-verification-required flag */
211 __u32 cpt : 1; /* channel-path timeout */
212 __u32 fsavf : 1; /* Failing storage address validity flag */
213 __u32 cons : 1; /* concurrent-sense */
214 __u32 res8 : 2; /* reserved */
215 __u32 scnt : 6; /* sense count if cons == 1 */
216 __u32 res16 : 16; /* reserved */
217 } __attribute__ ((packed)) erw_t;
218
219 /*
220 * subchannel logout area
221 */
222 typedef struct {
223 __u32 res0 : 1; /* reserved */
224 __u32 esf : 7; /* extended status flags */
225 __u32 lpum : 8; /* last path used mask */
226 __u32 res16 : 1; /* reserved */
227 __u32 fvf : 5; /* field-validity flags */
228 __u32 sacc : 2; /* storage access code */
229 __u32 termc : 2; /* termination code */
230 __u32 devsc : 1; /* device-status check */
231 __u32 serr : 1; /* secondary error */
232 __u32 ioerr : 1; /* i/o-error alert */
233 __u32 seqc : 3; /* sequence code */
234 } __attribute__ ((packed)) sublog_t ;
235
236 /*
237 * Format 0 Extended Status Word (ESW)
238 */
239 typedef struct {
240 sublog_t sublog; /* subchannel logout */
241 erw_t erw; /* extended report word */
242 __u32 faddr; /* failing address */
243 __u32 zeros[2]; /* 2 fullwords of zeros */
244 } __attribute__ ((packed)) esw0_t;
245
246 /*
247 * Format 1 Extended Status Word (ESW)
248 */
249 typedef struct {
250 __u8 zero0; /* reserved zeros */
251 __u8 lpum; /* last path used mask */
252 __u8 zero16; /* reserved zeros */
253 erw_t erw; /* extended report word */
254 __u32 zeros[3]; /* 2 fullwords of zeros */
255 } __attribute__ ((packed)) esw1_t;
256
257 /*
258 * Format 2 Extended Status Word (ESW)
259 */
260 typedef struct {
261 __u8 zero0; /* reserved zeros */
262 __u8 lpum; /* last path used mask */
263 __u16 dcti; /* device-connect-time interval */
264 erw_t erw; /* extended report word */
265 __u32 zeros[3]; /* 2 fullwords of zeros */
266 } __attribute__ ((packed)) esw2_t;
267
268 /*
269 * Format 3 Extended Status Word (ESW)
270 */
271 typedef struct {
272 __u8 zero0; /* reserved zeros */
273 __u8 lpum; /* last path used mask */
274 __u16 res; /* reserved */
275 erw_t erw; /* extended report word */
276 __u32 zeros[3]; /* 2 fullwords of zeros */
277 } __attribute__ ((packed)) esw3_t;
278
279 typedef union {
280 esw0_t esw0;
281 esw1_t esw1;
282 esw2_t esw2;
283 esw3_t esw3;
284 } __attribute__ ((packed)) esw_t;
285
286 /*
287 * interruption response block
288 */
289 typedef struct {
290 scsw_t scsw; /* subchannel status word */
291 esw_t esw; /* extended status word */
292 __u8 ecw[32]; /* extended control word */
293 } irb_t __attribute__ ((packed,aligned(4)));
294
295 /*
296 * TPI info structure
297 */
298 typedef struct {
299 __u32 res : 16; /* reserved 0x00000001 */
300 __u32 irq : 16; /* aka. subchannel number */
301 __u32 intparm; /* interruption parameter */
302 } __attribute__ ((packed)) tpi_info_t;
303
304
305 /*
306 * This is the "IRQ descriptor", which contains various information
307 * about the irq, including what kind of hardware handling it has,
308 * whether it is disabled etc etc.
309 *
310 * Pad this out to 32 bytes for cache and indexing reasons.
311 */
312 typedef struct {
313 __u32 status; /* IRQ status - IRQ_INPROGRESS, IRQ_DISABLED */
314 struct hw_interrupt_type *handler; /* handle/enable/disable functions */
315 struct irqaction *action; /* IRQ action list */
316 } irq_desc_t;
317
318 //
319 // command information word (CIW) layout
320 //
321 typedef struct _ciw {
322 __u32 et : 2; // entry type
323 __u32 reserved : 2; // reserved
324 __u32 ct : 4; // command type
325 __u32 cmd : 8; // command
326 __u32 count : 16; // count
327 } __attribute__ ((packed)) ciw_t;
328
329 #define CIW_TYPE_RCD 0x0 // read configuration data
330 #define CIW_TYPE_SII 0x1 // set interface identifier
331 #define CIW_TYPE_RNI 0x2 // read node identifier
332
333 //
334 // sense-id response buffer layout
335 //
336 typedef struct {
337 /* common part */
338 __u8 reserved; /* always 0x'FF' */
339 __u16 cu_type; /* control unit type */
340 __u8 cu_model; /* control unit model */
341 __u16 dev_type; /* device type */
342 __u8 dev_model; /* device model */
343 __u8 unused; /* padding byte */
344 /* extended part */
345 ciw_t ciw[62]; /* variable # of CIWs */
346 } __attribute__ ((packed,aligned(4))) senseid_t;
347
348 /*
349 * sense data
350 */
351 typedef struct {
352 __u8 res[32]; /* reserved */
353 __u8 data[32]; /* sense data */
354 } __attribute__ ((packed)) sense_t;
355
356 /*
357 * device status area, to be provided by the device driver
358 * when calling request_irq() as parameter "dev_id", later
359 * tied to the "action" control block.
360 *
361 * Note : No data area must be added after union ii or the
362 * effective devstat size calculation will fail !
363 */
364 typedef struct {
365 __u16 devno; /* device number, aka. "cuu" from irb */
366 unsigned int intparm; /* interrupt parameter */
367 __u8 cstat; /* channel status - accumulated */
368 __u8 dstat; /* device status - accumulated */
369 __u8 lpum; /* last path used mask from irb */
370 __u8 unused; /* not used - reserved */
371 unsigned int flag; /* flag : see below */
372 __u32 cpa; /* CCW address from irb at primary status */
373 __u32 rescnt; /* res. count from irb at primary status */
374 __u32 scnt; /* sense count, if DEVSTAT_FLAG_SENSE_AVAIL */
375 union {
376 irb_t irb; /* interruption response block */
377 sense_t sense; /* sense information */
378 } ii; /* interrupt information */
379 } devstat_t;
380
381 #define DEVSTAT_FLAG_SENSE_AVAIL 0x00000001
382 #define DEVSTAT_NOT_OPER 0x00000002
383 #define DEVSTAT_START_FUNCTION 0x00000004
384 #define DEVSTAT_HALT_FUNCTION 0x00000008
385 #define DEVSTAT_STATUS_PENDING 0x00000010
386 #define DEVSTAT_REVALIDATE 0x00000020
387 #define DEVSTAT_DEVICE_GONE 0x00000040
388 #define DEVSTAT_DEVICE_OWNED 0x00000080
389 #define DEVSTAT_CLEAR_FUNCTION 0x00000100
390 #define DEVSTAT_FINAL_STATUS 0x80000000
391
392 #define INTPARM_STATUS_PENDING 0xFFFFFFFF
393
394 typedef struct {
395 __u8 state1 : 2; /* path state value 1 */
396 __u8 state2 : 2; /* path state value 2 */
397 __u8 state3 : 1; /* path state value 3 */
398 __u8 resvd : 3; /* reserved */
399 } __attribute__ ((packed)) path_state_t;
400
401 typedef struct {
402 union {
403 __u8 fc; /* SPID function code */
404 path_state_t ps; /* SNID path state */
405 } inf;
406 __u32 cpu_addr : 16; /* CPU address */
407 __u32 cpu_id : 24; /* CPU identification */
408 __u32 cpu_model : 16; /* CPU model */
409 __u32 tod_high; /* high word TOD clock */
410 } __attribute__ ((packed)) pgid_t;
411
412 #define SPID_FUNC_MULTI_PATH 0x80
413 #define SPID_FUNC_ESTABLISH 0x00
414 #define SPID_FUNC_RESIGN 0x40
415 #define SPID_FUNC_DISBAND 0x20
416
417 #define SNID_STATE1_RESET 0x0
418 #define SNID_STATE1_UNGROUPED 0x8
419 #define SNID_STATE1_GROUPED 0xC
420
421 #define SNID_STATE2_NOT_RESVD 0x0
422 #define SNID_STATE2_RESVD_ELSE 0x8
423 #define SNID_STATE2_RESVD_SELF 0xC
424
425 #define SNID_STATE3_MULTI_PATH 1
426
427 /*
428 * Flags used as input parameters for do_IO()
429 */
430 #define DOIO_EARLY_NOTIFICATION 0x01 /* allow for I/O completion ... */
431 /* ... notification after ... */
432 /* ... primary interrupt status */
433 #define DOIO_RETURN_CHAN_END DOIO_EARLY_NOTIFICATION
434 #define DOIO_VALID_LPM 0x02 /* LPM input parameter is valid */
435 #define DOIO_WAIT_FOR_INTERRUPT 0x04 /* wait synchronously for interrupt */
436 #define DOIO_REPORT_ALL 0x08 /* report all interrupt conditions */
437 #define DOIO_ALLOW_SUSPEND 0x10 /* allow for channel prog. suspend */
438 #define DOIO_DENY_PREFETCH 0x20 /* don't allow for CCW prefetch */
439 #define DOIO_SUPPRESS_INTER 0x40 /* suppress intermediate inter. */
440 /* ... for suspended CCWs */
441 #define DOIO_TIMEOUT 0x80 /* 3 secs. timeout for sync. I/O */
442
443 /*
444 * do_IO()
445 *
446 * Start a S/390 channel program. When the interrupt arrives
447 * handle_IRQ_event() is called, which eventually calls the
448 * IRQ handler, either immediately, delayed (dev-end missing,
449 * or sense required) or never (no IRQ handler registered -
450 * should never occur, as the IRQ (subchannel ID) should be
451 * disabled if no handler is present. Depending on the action
452 * taken, do_IO() returns : 0 - Success
453 * -EIO - Status pending
454 * see : action->dev_id->cstat
455 * action->dev_id->dstat
456 * -EBUSY - Device busy
457 * -ENODEV - Device not operational
458 */
459 int do_IO( int irq, /* IRQ aka. subchannel number */
460 ccw1_t *cpa, /* logical channel program address */
461 unsigned long intparm, /* interruption parameter */
462 __u8 lpm, /* logical path mask */
463 unsigned long flag); /* flags : see above */
464
465 int start_IO( int irq, /* IRQ aka. subchannel number */
466 ccw1_t *cpa, /* logical channel program address */
467 unsigned int intparm, /* interruption parameter */
468 __u8 lpm, /* logical path mask */
469 unsigned int flag); /* flags : see above */
470
471 void do_crw_pending( void ); /* CRW handler */
472
473 int resume_IO( int irq); /* IRQ aka. subchannel number */
474
475 int halt_IO( int irq, /* IRQ aka. subchannel number */
476 unsigned long intparm, /* dummy intparm */
477 unsigned long flag); /* possible DOIO_WAIT_FOR_INTERRUPT */
478
479 int clear_IO( int irq, /* IRQ aka. subchannel number */
480 unsigned long intparm, /* dummy intparm */
481 unsigned long flag); /* possible DOIO_WAIT_FOR_INTERRUPT */
482
483 int process_IRQ( struct pt_regs regs,
484 unsigned int irq,
485 unsigned int intparm);
486
487
488 int enable_cpu_sync_isc ( int irq );
489 int disable_cpu_sync_isc( int irq );
490
491 typedef struct {
492 int irq; /* irq, aka. subchannel */
493 __u16 devno; /* device number */
494 unsigned int status; /* device status */
495 senseid_t sid_data; /* senseID data */
496 } dev_info_t;
497
498 int get_dev_info( int irq, dev_info_t *); /* to be eliminated - don't use */
499
500 int get_dev_info_by_irq ( int irq, dev_info_t *pdi);
501 int get_dev_info_by_devno( __u16 devno, dev_info_t *pdi);
502
503 int get_irq_by_devno( __u16 devno );
504 unsigned int get_devno_by_irq( int irq );
505
506 int get_irq_first( void );
507 int get_irq_next ( int irq );
508
509 int read_dev_chars( int irq, void **buffer, int length );
510 int read_conf_data( int irq, void **buffer, int *length );
511
512 extern int handle_IRQ_event( unsigned int irq, int cpu, struct pt_regs *);
513
514 extern int set_cons_dev(int irq);
515 extern int reset_cons_dev(int irq);
516 extern int wait_cons_dev(int irq);
517
518 /*
519 * Some S390 specific IO instructions as inline
520 */
521
522 extern __inline__ int stsch(int irq, volatile schib_t *addr)
523 {
524 int ccode;
525
526 __asm__ __volatile__(
527 "LR 1,%1\n\t"
528 "STSCH 0(%2)\n\t"
529 "IPM %0\n\t"
530 "SRL %0,28\n\t"
531 : "=d" (ccode) : "r" (irq | 0x10000L), "a" (addr)
532 : "cc", "1" );
533 return ccode;
534 }
535
536 extern __inline__ int msch(int irq, volatile schib_t *addr)
537 {
538 int ccode;
539
540 __asm__ __volatile__(
541 "LR 1,%1\n\t"
542 "MSCH 0(%2)\n\t"
543 "IPM %0\n\t"
544 "SRL %0,28\n\t"
545 : "=d" (ccode) : "r" (irq | 0x10000L), "a" (addr)
546 : "cc", "1" );
547 return ccode;
548 }
549
550 extern __inline__ int msch_err(int irq, volatile schib_t *addr)
551 {
552 int ccode;
553
554 __asm__ __volatile__(
555 " lr 1,%1\n"
556 " msch 0(%2)\n"
557 "0: ipm %0\n"
558 " srl %0,28\n"
559 "1:\n"
560 ".section .fixup,\"ax\"\n"
561 "2: l %0,%3\n"
562 " bras 1,3f\n"
563 " .long 1b\n"
564 "3: l 1,0(1)\n"
565 " br 1\n"
566 ".previous\n"
567 ".section __ex_table,\"a\"\n"
568 " .align 4\n"
569 " .long 0b,2b\n"
570 ".previous"
571 : "=d" (ccode)
572 : "r" (irq | 0x10000L), "a" (addr), "i" (__LC_PGM_ILC)
573 : "cc", "1" );
574 return ccode;
575 }
576
577 extern __inline__ int tsch(int irq, volatile irb_t *addr)
578 {
579 int ccode;
580
581 __asm__ __volatile__(
582 "LR 1,%1\n\t"
583 "TSCH 0(%2)\n\t"
584 "IPM %0\n\t"
585 "SRL %0,28\n\t"
586 : "=d" (ccode) : "r" (irq | 0x10000L), "a" (addr)
587 : "cc", "1" );
588 return ccode;
589 }
590
591 extern __inline__ int tpi( volatile tpi_info_t *addr)
592 {
593 int ccode;
594
595 __asm__ __volatile__(
596 "TPI 0(%1)\n\t"
597 "IPM %0\n\t"
598 "SRL %0,28\n\t"
599 : "=d" (ccode) : "a" (addr)
600 : "cc", "1" );
601 return ccode;
602 }
603
604 extern __inline__ int ssch(int irq, volatile orb_t *addr)
605 {
606 int ccode;
607
608 __asm__ __volatile__(
609 "LR 1,%1\n\t"
610 "SSCH 0(%2)\n\t"
611 "IPM %0\n\t"
612 "SRL %0,28\n\t"
613 : "=d" (ccode) : "r" (irq | 0x10000L), "a" (addr)
614 : "cc", "1" );
615 return ccode;
616 }
617
618 extern __inline__ int rsch(int irq)
619 {
620 int ccode;
621
622 __asm__ __volatile__(
623 "LR 1,%1\n\t"
624 "RSCH\n\t"
625 "IPM %0\n\t"
626 "SRL %0,28\n\t"
627 : "=d" (ccode) : "r" (irq | 0x10000L)
628 : "cc", "1" );
629 return ccode;
630 }
631
632 extern __inline__ int csch(int irq)
633 {
634 int ccode;
635
636 __asm__ __volatile__(
637 "LR 1,%1\n\t"
638 "CSCH\n\t"
639 "IPM %0\n\t"
640 "SRL %0,28\n\t"
641 : "=d" (ccode) : "r" (irq | 0x10000L)
642 : "cc", "1" );
643 return ccode;
644 }
645
646 extern __inline__ int hsch(int irq)
647 {
648 int ccode;
649
650 __asm__ __volatile__(
651 "LR 1,%1\n\t"
652 "HSCH\n\t"
653 "IPM %0\n\t"
654 "SRL %0,28\n\t"
655 : "=d" (ccode) : "r" (irq | 0x10000L)
656 : "cc", "1" );
657 return ccode;
658 }
659
660 extern __inline__ int iac( void)
661 {
662 int ccode;
663
664 __asm__ __volatile__(
665 "IAC 1\n\t"
666 "IPM %0\n\t"
667 "SRL %0,28\n\t"
668 : "=d" (ccode) : : "cc", "1" );
669 return ccode;
670 }
671
672 typedef struct {
673 __u16 vrdcdvno : 16; /* device number (input) */
674 __u16 vrdclen : 16; /* data block length (input) */
675 __u32 vrdcvcla : 8; /* virtual device class (output) */
676 __u32 vrdcvtyp : 8; /* virtual device type (output) */
677 __u32 vrdcvsta : 8; /* virtual device status (output) */
678 __u32 vrdcvfla : 8; /* virtual device flags (output) */
679 __u32 vrdcrccl : 8; /* real device class (output) */
680 __u32 vrdccrty : 8; /* real device type (output) */
681 __u32 vrdccrmd : 8; /* real device model (output) */
682 __u32 vrdccrft : 8; /* real device feature (output) */
683 } __attribute__ ((packed,aligned(4))) diag210_t;
684
685 void VM_virtual_device_info( __u16 devno, /* device number */
686 senseid_t *ps ); /* ptr to senseID data */
687
688 extern __inline__ int diag210( diag210_t * addr)
689 {
690 int ccode;
691
692 __asm__ __volatile__(
693 "LR 1,%1\n\t"
694 ".long 0x83110210\n\t"
695 "IPM %0\n\t"
696 "SRL %0,28\n\t"
697 : "=d" (ccode) : "a" (addr)
698 : "cc", "1" );
699 return ccode;
700 }
701
702 /*
703 * Various low-level irq details needed by irq.c, process.c,
704 * time.c, io_apic.c and smp.c
705 *
706 * Interrupt entry/exit code at both C and assembly level
707 */
708
709 void mask_irq(unsigned int irq);
710 void unmask_irq(unsigned int irq);
711
712 #define MAX_IRQ_SOURCES 128
713
714 extern spinlock_t irq_controller_lock;
715
716 #ifdef CONFIG_SMP
717
718 #include <asm/atomic.h>
719
720 static inline void irq_enter(int cpu, unsigned int irq)
721 {
722 hardirq_enter(cpu);
723 while (test_bit(0,&global_irq_lock)) {
724 eieio();
725 }
726 }
727
728 static inline void irq_exit(int cpu, unsigned int irq)
729 {
730 hardirq_exit(cpu);
731 release_irqlock(cpu);
732 }
733
734
735 #else
736
737 #define irq_enter(cpu, irq) (++local_irq_count(cpu))
738 #define irq_exit(cpu, irq) (--local_irq_count(cpu))
739
740 #endif
741
742 #define __STR(x) #x
743 #define STR(x) __STR(x)
744
745 #ifdef CONFIG_SMP
746
747 /*
748 * SMP has a few special interrupts for IPI messages
749 */
750
751 #endif /* CONFIG_SMP */
752
753 /*
754 * x86 profiling function, SMP safe. We might want to do this in
755 * assembly totally?
756 */
757 static inline void s390_do_profile (unsigned long addr)
758 {
759 #if 0
760 if (prof_buffer && current->pid) {
761 addr -= (unsigned long) &_stext;
762 addr >>= prof_shift;
763 /*
764 * Don't ignore out-of-bounds EIP values silently,
765 * put them into the last histogram slot, so if
766 * present, they will show up as a sharp peak.
767 */
768 if (addr > prof_len-1)
769 addr = prof_len-1;
770 atomic_inc((atomic_t *)&prof_buffer[addr]);
771 }
772 #endif
773 }
774
775 #include <asm/s390io.h>
776
777 #define s390irq_spin_lock(irq) \
778 spin_lock(&(ioinfo[irq]->irq_lock))
779
780 #define s390irq_spin_unlock(irq) \
781 spin_unlock(&(ioinfo[irq]->irq_lock))
782
783 #define s390irq_spin_lock_irqsave(irq,flags) \
784 spin_lock_irqsave(&(ioinfo[irq]->irq_lock), flags)
785 #define s390irq_spin_unlock_irqrestore(irq,flags) \
786 spin_unlock_irqrestore(&(ioinfo[irq]->irq_lock), flags)
787 #endif
788
789
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