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Linux Cross Reference
Linux/include/asm-s390/lowcore.h

Version: ~ [ 2.4.0 ] ~
Architecture: ~ [ i386 ] ~ [ alpha ] ~ [ m68k ] ~ [ mips ] ~ [ ppc ] ~ [ sparc ] ~ [ sparc64 ] ~

  1 /*
  2  *  include/asm-s390/lowcore.h
  3  *
  4  *  S390 version
  5  *    Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
  6  *    Author(s): Hartmut Penner (hp@de.ibm.com),
  7  *               Martin Schwidefsky (schwidefsky@de.ibm.com),
  8  *               Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
  9  */
 10 
 11 #ifndef _ASM_S390_LOWCORE_H
 12 #define _ASM_S390_LOWCORE_H
 13 
 14 #define __LC_EXT_OLD_PSW                0x018
 15 #define __LC_SVC_OLD_PSW                0x020
 16 #define __LC_PGM_OLD_PSW                0x028
 17 #define __LC_MCK_OLD_PSW                0x030
 18 #define __LC_IO_OLD_PSW                 0x038
 19 #define __LC_EXT_NEW_PSW                0x058
 20 #define __LC_SVC_NEW_PSW                0x060
 21 #define __LC_PGM_NEW_PSW                0x068
 22 #define __LC_MCK_NEW_PSW                0x070
 23 #define __LC_IO_NEW_PSW                 0x078
 24 #define __LC_EXT_PARAMS                 0x080
 25 #define __LC_CPU_ADDRESS                0x084
 26 #define __LC_EXT_INT_CODE               0x086
 27 #define __LC_SVC_INT_CODE               0x08B
 28 #define __LC_PGM_ILC                    0x08C
 29 #define __LC_PGM_INT_CODE               0x08E
 30 #define __LC_TRANS_EXC_ADDR             0x090
 31 #define __LC_SUBCHANNEL_ID              0x0B8
 32 #define __LC_SUBCHANNEL_NR              0x0BA
 33 #define __LC_IO_INT_PARM                0x0BC
 34 #define __LC_MCCK_CODE                  0x0E8
 35 #define __LC_AREGS_SAVE_AREA            0x200
 36 #define __LC_CREGS_SAVE_AREA            0x240
 37 #define __LC_RETURN_PSW                 0x280
 38 
 39 #define __LC_SYNC_IO_WORD               0x400
 40 
 41 #define __LC_SAVE_AREA                  0xC00
 42 #define __LC_KERNEL_STACK               0xC40
 43 #define __LC_KERNEL_LEVEL               0xC44
 44 #define __LC_IRQ_STAT                   0xC48
 45 #define __LC_CPUID                      0xC60
 46 #define __LC_CPUADDR                    0xC68
 47 #define __LC_IPLDEV                     0xC7C
 48 
 49 
 50 /* interrupt handler start with all io, external and mcck interrupt disabled */
 51 
 52 #define _RESTART_PSW_MASK    0x00080000
 53 #define _EXT_PSW_MASK        0x04080000
 54 #define _PGM_PSW_MASK        0x04080000
 55 #define _SVC_PSW_MASK        0x04080000
 56 #define _MCCK_PSW_MASK       0x040A0000
 57 #define _IO_PSW_MASK         0x04080000
 58 #define _USER_PSW_MASK       0x070DC000/* DAT, IO, EXT, Home-space         */
 59 #define _WAIT_PSW_MASK       0x070E0000/* DAT, IO, EXT, Wait, Home-space   */
 60 #define _DW_PSW_MASK         0x000A0000/* disabled wait PSW mask           */
 61 
 62 #define _PRIMARY_MASK        0x0000    /* MASK for SACF                    */
 63 #define _SECONDARY_MASK      0x0100    /* MASK for SACF                    */
 64 #define _ACCESS_MASK         0x0200    /* MASK for SACF                    */
 65 #define _HOME_MASK           0x0300    /* MASK for SACF                    */
 66 
 67 #define _PSW_PRIM_SPACE_MODE 0x00000000
 68 #define _PSW_SEC_SPACE_MODE  0x00008000
 69 #define _PSW_ACC_REG_MODE    0x00004000
 70 #define _PSW_HOME_SPACE_MODE 0x0000C000
 71 
 72 #define _PSW_WAIT_MASK_BIT   0x00020000 /* Wait bit */
 73 #define _PSW_IO_MASK_BIT     0x02000000 /* IO bit */
 74 #define _PSW_IO_WAIT         0x02020000 /* IO & Wait bit */
 75 
 76 /* we run in 31 Bit mode */
 77 #define _ADDR_31             0x80000000
 78 
 79 #ifndef __ASSEMBLY__
 80 
 81 #include <linux/config.h>
 82 #include <asm/processor.h>
 83 #include <linux/types.h>
 84 #include <asm/atomic.h>
 85 #include <asm/sigp.h>
 86 
 87 
 88 struct _lowcore
 89 {
 90         /* prefix area: defined by architecture */
 91         psw_t        restart_psw;              /* 0x000 */
 92         __u32        ccw2[4];                  /* 0x008 */
 93         psw_t        external_old_psw;         /* 0x018 */
 94         psw_t        svc_old_psw;              /* 0x020 */
 95         psw_t        program_old_psw;          /* 0x028 */
 96         psw_t        mcck_old_psw;             /* 0x030 */
 97         psw_t        io_old_psw;               /* 0x038 */
 98         __u8         pad1[0x58-0x40];          /* 0x040 */
 99         psw_t        external_new_psw;         /* 0x058 */
100         psw_t        svc_new_psw;              /* 0x060 */
101         psw_t        program_new_psw;          /* 0x068 */
102         psw_t        mcck_new_psw;             /* 0x070 */
103         psw_t        io_new_psw;               /* 0x078 */
104         __u32        ext_params;               /* 0x080 */
105         __u16        cpu_addr;                 /* 0x084 */
106         __u16        ext_int_code;             /* 0x086 */
107         __u16        svc_ilc;                  /* 0x088 */
108         __u16        scv_code;                 /* 0x08a */
109         __u16        pgm_ilc;                  /* 0x08c */
110         __u16        pgm_code;                 /* 0x08e */
111         __u32        trans_exc_code;           /* 0x090 */
112         __u16        mon_class_num;            /* 0x094 */
113         __u16        per_perc_atmid;           /* 0x096 */
114         __u32        per_address;              /* 0x098 */
115         __u32        monitor_code;             /* 0x09c */
116         __u8         exc_access_id;            /* 0x0a0 */
117         __u8         per_access_id;            /* 0x0a1 */
118         __u8         pad2[0xB8-0xA2];          /* 0x0a2 */
119         __u16        subchannel_id;            /* 0x0b8 */
120         __u16        subchannel_nr;            /* 0x0ba */
121         __u32        io_int_parm;              /* 0x0bc */
122         __u8         pad3[0xD8-0xC0];          /* 0x0c0 */
123         __u32        cpu_timer_save_area[2];   /* 0x0d8 */
124         __u32        clock_comp_save_area[2];  /* 0x0e0 */
125         __u32        mcck_interuption_code[2]; /* 0x0e8 */
126         __u8         pad4[0xf4-0xf0];          /* 0x0f0 */
127         __u32        external_damage_code;     /* 0x0f4 */
128         __u32        failing_storage_address;  /* 0x0f8 */
129         __u8         pad5[0x100-0xfc];         /* 0x0fc */
130         __u32        st_status_fixed_logout[4];/* 0x100 */
131         __u8         pad6[0x160-0x110];        /* 0x110 */
132         __u32        floating_pt_save_area[8]; /* 0x160 */
133         __u32        gpregs_save_area[16];     /* 0x180 */
134         __u8         pad7[0x200-0x1c0];        /* 0x1c0 */
135 
136         __u32        access_regs_save_area[16];/* 0x200 */
137         __u32        cregs_save_area[16];      /* 0x240 */      
138         psw_t        return_psw;               /* 0x280 */
139         __u8         pad8[0x400-0x288];        /* 0x288 */
140 
141         __u32        sync_io_word;             /* 0x400 */
142 
143         __u8         pad9[0xc00-0x404];        /* 0x404 */
144 
145         /* System info area */
146         __u32        save_area[16];            /* 0xc00 */
147         __u32        kernel_stack;             /* 0xc40 */
148         __u32        kernel_level;             /* 0xc44 */
149         /* entry.S sensitive area start */
150         /* Next 6 words are the s390 equivalent of irq_stat */
151         __u32        __softirq_active;         /* 0xc48 */
152         __u32        __softirq_mask;           /* 0xc4c */
153         __u32        __local_irq_count;        /* 0xc50 */
154         __u32        __local_bh_count;         /* 0xc54 */
155         __u32        __syscall_count;          /* 0xc58 */
156         __u8         pad10[0xc60-0xc5c];       /* 0xc5c */
157         struct       cpuinfo_S390 cpu_data;    /* 0xc60 */
158         __u32        ipl_device;               /* 0xc7c */
159         /* entry.S sensitive area end */
160 
161         /* SMP info area: defined by DJB */
162         __u64        jiffy_timer_cc;           /* 0xc80 */
163         atomic_t     ext_call_fast;            /* 0xc88 */
164         atomic_t     ext_call_queue;           /* 0xc8c */
165         atomic_t     ext_call_count;           /* 0xc90 */
166 
167         /* Align SMP info to the top 1k of prefix area */
168         __u8         pad11[0x1000-0xc94];      /* 0xc94 */
169 } __attribute__((packed)); /* End structure*/
170 
171 extern __inline__ void set_prefix(__u32 address)
172 {
173         __asm__ __volatile__ ("spx %0" : : "m" (address) : "memory" );
174 }
175 
176 #define S390_lowcore (*((struct _lowcore *) 0))
177 extern struct _lowcore *lowcore_ptr[];
178 
179 #ifndef CONFIG_SMP
180 #define get_cpu_lowcore(cpu)    S390_lowcore
181 #define safe_get_cpu_lowcore(cpu) S390_lowcore
182 #else
183 #define get_cpu_lowcore(cpu)    (*lowcore_ptr[cpu])
184 #define safe_get_cpu_lowcore(cpu) \
185         ((cpu)==smp_processor_id() ? S390_lowcore:(*lowcore_ptr[(cpu)]))
186 #endif
187 #endif /* __ASSEMBLY__ */
188 
189 #endif
190 
191 

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