1 #ifndef __ASM_SH_PGTABLE_H
2 #define __ASM_SH_PGTABLE_H
3
4 /* Copyright (C) 1999 Niibe Yutaka */
5
6 /*
7 * This file contains the functions and defines necessary to modify and use
8 * the SuperH page table tree.
9 */
10 #ifndef __ASSEMBLY__
11 #include <asm/processor.h>
12 #include <asm/addrspace.h>
13 #include <linux/threads.h>
14
15 extern pgd_t swapper_pg_dir[1024];
16 extern void paging_init(void);
17
18 #if defined(__sh3__)
19 /* Cache flushing:
20 *
21 * - flush_cache_all() flushes entire cache
22 * - flush_cache_mm(mm) flushes the specified mm context's cache lines
23 * - flush_cache_page(mm, vmaddr) flushes a single page
24 * - flush_cache_range(mm, start, end) flushes a range of pages
25 *
26 * - flush_dcache_page(pg) flushes(wback&invalidates) a page for dcache
27 * - flush_page_to_ram(page) write back kernel page to ram
28 * - flush_icache_range(start, end) flushes(invalidates) a range for icache
29 * - flush_icache_page(vma, pg) flushes(invalidates) a page for icache
30 *
31 * Caches are indexed (effectively) by physical address on SH-3, so
32 * we don't need them.
33 */
34 #define flush_cache_all() do { } while (0)
35 #define flush_cache_mm(mm) do { } while (0)
36 #define flush_cache_range(mm, start, end) do { } while (0)
37 #define flush_cache_page(vma, vmaddr) do { } while (0)
38 #define flush_page_to_ram(page) do { } while (0)
39 #define flush_dcache_page(page) do { } while (0)
40 #define flush_icache_range(start, end) do { } while (0)
41 #define flush_icache_page(vma,pg) do { } while (0)
42 #elif defined(__SH4__)
43 /*
44 * Caches are broken on SH-4, so we need them.
45 */
46 extern void flush_cache_all(void);
47 extern void flush_cache_mm(struct mm_struct *mm);
48 extern void flush_cache_range(struct mm_struct *mm, unsigned long start,
49 unsigned long end);
50 extern void flush_cache_page(struct vm_area_struct *vma, unsigned long addr);
51 extern void flush_page_to_ram(struct page *page);
52 extern void flush_dcache_page(struct page *pg);
53 extern void flush_icache_range(unsigned long start, unsigned long end);
54 extern void flush_icache_page(struct vm_area_struct *vma, struct page *pg);
55 #endif
56
57 /*
58 * Basically we have the same two-level (which is the logical three level
59 * Linux page table layout folded) page tables as the i386.
60 */
61
62 /*
63 * ZERO_PAGE is a global shared page that is always zero: used
64 * for zero-mapped memory areas etc..
65 */
66 extern unsigned long empty_zero_page[1024];
67 #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
68
69 #endif /* !__ASSEMBLY__ */
70
71 #include <asm/pgtable-2level.h>
72
73 #define __beep() asm("")
74
75 #define PMD_SIZE (1UL << PMD_SHIFT)
76 #define PMD_MASK (~(PMD_SIZE-1))
77 #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
78 #define PGDIR_MASK (~(PGDIR_SIZE-1))
79
80 #define USER_PTRS_PER_PGD (TASK_SIZE/PGDIR_SIZE)
81 #define FIRST_USER_PGD_NR 0
82
83 #define USER_PGD_PTRS (PAGE_OFFSET >> PGDIR_SHIFT)
84 #define KERNEL_PGD_PTRS (PTRS_PER_PGD-USER_PGD_PTRS)
85
86 #define TWOLEVEL_PGDIR_SHIFT 22
87 #define BOOT_USER_PGD_PTRS (PAGE_OFFSET >> TWOLEVEL_PGDIR_SHIFT)
88 #define BOOT_KERNEL_PGD_PTRS (1024-BOOT_USER_PGD_PTRS)
89
90 #ifndef __ASSEMBLY__
91 #define VMALLOC_START P3SEG
92 #define VMALLOC_VMADDR(x) ((unsigned long)(x))
93 #define VMALLOC_END P4SEG
94
95 /* 0x001 WT-bit on SH-4, 0 on SH-3 */
96 #define _PAGE_HW_SHARED 0x002 /* SH-bit : page is shared among processes */
97 #define _PAGE_DIRTY 0x004 /* D-bit : page changed */
98 #define _PAGE_CACHABLE 0x008 /* C-bit : cachable */
99 /* 0x010 SZ0-bit : Size of page */
100 #define _PAGE_RW 0x020 /* PR0-bit : write access allowed */
101 #define _PAGE_USER 0x040 /* PR1-bit : user space access allowed */
102 /* 0x080 SZ1-bit : Size of page (on SH-4) */
103 #define _PAGE_PRESENT 0x100 /* V-bit : page is valid */
104 #define _PAGE_PROTNONE 0x200 /* software: if not present */
105 #define _PAGE_ACCESSED 0x400 /* software: page referenced */
106 #define _PAGE_U0_SHARED 0x800 /* software: page is shared in user space */
107
108
109 /* software: moves to PTEA.TC (Timing Control) */
110 #define _PAGE_PCC_AREA5 0x00000000 /* use BSC registers for area5 */
111 #define _PAGE_PCC_AREA6 0x80000000 /* use BSC registers for area6 */
112
113 /* software: moves to PTEA.SA[2:0] (Space Attributes) */
114 #define _PAGE_PCC_IODYN 0x00000001 /* IO space, dynamically sized bus */
115 #define _PAGE_PCC_IO8 0x20000000 /* IO space, 8 bit bus */
116 #define _PAGE_PCC_IO16 0x20000001 /* IO space, 16 bit bus */
117 #define _PAGE_PCC_COM8 0x40000000 /* Common Memory space, 8 bit bus */
118 #define _PAGE_PCC_COM16 0x40000001 /* Common Memory space, 16 bit bus */
119 #define _PAGE_PCC_ATR8 0x60000000 /* Attribute Memory space, 8 bit bus */
120 #define _PAGE_PCC_ATR16 0x60000001 /* Attribute Memory space, 6 bit bus */
121
122
123 /* Mask which drop software flags */
124 #define _PAGE_FLAGS_HARDWARE_MASK 0x1ffff1fe
125 /* Hardware flags: SZ=1 (4k-byte) */
126 #define _PAGE_FLAGS_HARD 0x00000010
127
128 #if defined(__sh3__)
129 #define _PAGE_SHARED _PAGE_HW_SHARED
130 #elif defined(__SH4__)
131 #define _PAGE_SHARED _PAGE_U0_SHARED
132 #endif
133
134 #define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED | _PAGE_DIRTY)
135 #define _KERNPG_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | _PAGE_DIRTY)
136 #define _PAGE_CHG_MASK (PTE_MASK | _PAGE_ACCESSED | _PAGE_CACHABLE | _PAGE_DIRTY | _PAGE_SHARED)
137
138 #define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_CACHABLE |_PAGE_ACCESSED | _PAGE_FLAGS_HARD)
139 #define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_CACHABLE |_PAGE_ACCESSED | _PAGE_SHARED | _PAGE_FLAGS_HARD)
140 #define PAGE_COPY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_CACHABLE | _PAGE_ACCESSED | _PAGE_FLAGS_HARD)
141 #define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_CACHABLE | _PAGE_ACCESSED | _PAGE_FLAGS_HARD)
142 #define PAGE_KERNEL __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_CACHABLE | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_HW_SHARED | _PAGE_FLAGS_HARD)
143 #define PAGE_KERNEL_RO __pgprot(_PAGE_PRESENT | _PAGE_CACHABLE | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_HW_SHARED | _PAGE_FLAGS_HARD)
144 #define PAGE_KERNEL_PCC(slot, type) \
145 __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_FLAGS_HARD | (slot ? _PAGE_PCC_AREA5 : _PAGE_PCC_AREA6) | (type))
146
147 /*
148 * As i386 and MIPS, SuperH can't do page protection for execute, and
149 * considers that the same as a read. Also, write permissions imply
150 * read permissions. This is the closest we can get..
151 */
152
153 #define __P000 PAGE_NONE
154 #define __P001 PAGE_READONLY
155 #define __P010 PAGE_COPY
156 #define __P011 PAGE_COPY
157 #define __P100 PAGE_READONLY
158 #define __P101 PAGE_READONLY
159 #define __P110 PAGE_COPY
160 #define __P111 PAGE_COPY
161
162 #define __S000 PAGE_NONE
163 #define __S001 PAGE_READONLY
164 #define __S010 PAGE_SHARED
165 #define __S011 PAGE_SHARED
166 #define __S100 PAGE_READONLY
167 #define __S101 PAGE_READONLY
168 #define __S110 PAGE_SHARED
169 #define __S111 PAGE_SHARED
170
171 /*
172 * Handling allocation failures during page table setup.
173 */
174 extern void __handle_bad_pmd(pmd_t * pmd);
175 extern void __handle_bad_pmd_kernel(pmd_t * pmd);
176
177 #define pte_none(x) (!pte_val(x))
178 #define pte_present(x) (pte_val(x) & (_PAGE_PRESENT | _PAGE_PROTNONE))
179 #define pte_clear(xp) do { set_pte(xp, __pte(0)); } while (0)
180
181 #define pmd_none(x) (!pmd_val(x))
182 #define pmd_present(x) (pmd_val(x) & _PAGE_PRESENT)
183 #define pmd_clear(xp) do { set_pmd(xp, __pmd(0)); } while (0)
184 #define pmd_bad(x) ((pmd_val(x) & (~PAGE_MASK & ~_PAGE_USER)) != _KERNPG_TABLE)
185
186 /*
187 * Permanent address of a page. Obviously must never be
188 * called on a highmem page.
189 */
190 #define page_address(page) ((page)->virtual)
191 #define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT))
192 #define pte_page(x) (mem_map+(unsigned long)(((pte_val(x) -__MEMORY_START) >> PAGE_SHIFT)))
193
194 /*
195 * The following only work if pte_present() is true.
196 * Undefined behaviour if not..
197 */
198 static inline int pte_read(pte_t pte) { return pte_val(pte) & _PAGE_USER; }
199 static inline int pte_exec(pte_t pte) { return pte_val(pte) & _PAGE_USER; }
200 static inline int pte_dirty(pte_t pte){ return pte_val(pte) & _PAGE_DIRTY; }
201 static inline int pte_young(pte_t pte){ return pte_val(pte) & _PAGE_ACCESSED; }
202 static inline int pte_write(pte_t pte){ return pte_val(pte) & _PAGE_RW; }
203 static inline int pte_shared(pte_t pte){ return pte_val(pte) & _PAGE_SHARED; }
204
205 static inline pte_t pte_rdprotect(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_USER)); return pte; }
206 static inline pte_t pte_exprotect(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_USER)); return pte; }
207 static inline pte_t pte_mkclean(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_DIRTY)); return pte; }
208 static inline pte_t pte_mkold(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_ACCESSED)); return pte; }
209 static inline pte_t pte_wrprotect(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_RW)); return pte; }
210 static inline pte_t pte_mkread(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_USER)); return pte; }
211 static inline pte_t pte_mkexec(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_USER)); return pte; }
212 static inline pte_t pte_mkdirty(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_DIRTY)); return pte; }
213 static inline pte_t pte_mkyoung(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_ACCESSED)); return pte; }
214 static inline pte_t pte_mkwrite(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_RW)); return pte; }
215
216 /*
217 * Conversion functions: convert a page and protection to a page entry,
218 * and a page entry and page directory to the page they refer to.
219 *
220 * extern pte_t mk_pte(struct page *page, pgprot_t pgprot)
221 */
222 #define mk_pte(page,pgprot) \
223 ({ pte_t __pte; \
224 \
225 set_pte(&__pte, __pte(((page)-mem_map) * \
226 (unsigned long long)PAGE_SIZE + pgprot_val(pgprot) + \
227 __MEMORY_START)); \
228 __pte; \
229 })
230
231 /* This takes a physical page address that is used by the remapping functions */
232 #define mk_pte_phys(physpage, pgprot) \
233 ({ pte_t __pte; set_pte(&__pte, __pte(physpage + pgprot_val(pgprot))); __pte; })
234
235 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
236 { set_pte(&pte, __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot))); return pte; }
237
238 #define page_pte(page) page_pte_prot(page, __pgprot(0))
239
240 #define pmd_page(pmd) \
241 ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))
242
243 /* to find an entry in a page-table-directory. */
244 #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
245 #define __pgd_offset(address) pgd_index(address)
246 #define pgd_offset(mm, address) ((mm)->pgd+pgd_index(address))
247
248 /* to find an entry in a kernel page-table-directory */
249 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
250
251 #define __pmd_offset(address) \
252 (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
253
254 /* Find an entry in the third-level page table.. */
255 #define __pte_offset(address) \
256 ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
257 #define pte_offset(dir, address) ((pte_t *) pmd_page(*(dir)) + \
258 __pte_offset(address))
259
260 extern void update_mmu_cache(struct vm_area_struct * vma,
261 unsigned long address, pte_t pte);
262
263 /* Encode and de-code a swap entry */
264 /*
265 * NOTE: We should set ZEROs at the position of _PAGE_PRESENT
266 * and _PAGE_PROTONOE bits
267 */
268 #define SWP_TYPE(x) ((x).val & 0xff)
269 #define SWP_OFFSET(x) ((x).val >> 10)
270 #define SWP_ENTRY(type, offset) ((swp_entry_t) { (type) | ((offset) << 10) })
271 #define pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
272 #define swp_entry_to_pte(x) ((pte_t) { (x).val })
273
274 #include <asm-generic/pgtable.h>
275
276 #endif /* !__ASSEMBLY__ */
277
278 /* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
279 #define PageSkip(page) (0)
280 #define kern_addr_valid(addr) (1)
281
282 #define io_remap_page_range remap_page_range
283
284 #endif /* __ASM_SH_PAGE_H */
285
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