1 #ifndef __ASM_SH_PTRACE_H
2 #define __ASM_SH_PTRACE_H
3
4 /*
5 * Copyright (C) 1999, 2000 Niibe Yutaka
6 *
7 */
8
9 /*
10 * GCC defines register number like this:
11 * -----------------------------
12 * 0 - 15 are integer registers
13 * 17 - 22 are control/special registers
14 * 24 - 39 fp registers
15 * 40 - 47 xd registers
16 * 48 - fpscr register
17 * -----------------------------
18 *
19 * We follows above, except:
20 * 16 --- program counter (PC)
21 * 22 --- syscall #
22 * 23 --- floating point communication register
23 */
24 #define REG_REG0 0
25 #define REG_REG15 15
26
27 #define REG_PC 16
28
29 #define REG_PR 17
30 #define REG_SR 18
31 #define REG_GBR 19
32 #define REG_MACH 20
33 #define REG_MACL 21
34
35 #define REG_SYSCALL 22
36
37 #define REG_FPUL 23
38
39 #define REG_FPREG0 24
40 #define REG_FPREG15 39
41 #define REG_XDREG0 40
42 #define REG_XDREG14 47
43 #define REG_FPSCR 48
44
45 #define PTRACE_SETOPTIONS 21
46
47 /* options set using PTRACE_SETOPTIONS */
48 #define PTRACE_O_TRACESYSGOOD 0x00000001
49
50 /*
51 * This struct defines the way the registers are stored on the
52 * kernel stack during a system call or other kernel entry.
53 */
54 struct pt_regs {
55 unsigned long regs[16];
56 unsigned long pc;
57 unsigned long pr;
58 unsigned long sr;
59 unsigned long gbr;
60 unsigned long mach;
61 unsigned long macl;
62 long syscall_nr;
63 };
64
65 #ifdef __KERNEL__
66 #define user_mode(regs) (((regs)->sr & 0x40000000)==0)
67 #define instruction_pointer(regs) ((regs)->pc)
68 extern void show_regs(struct pt_regs *);
69
70 /* User Break Controller */
71
72 #if defined(__sh3__)
73 #define UBC_BARA 0xffffffb0
74 #define UBC_BAMRA 0xffffffb4
75 #define UBC_BBRA 0xffffffb8
76 #define UBC_BASRA 0xffffffe4
77 #define UBC_BARB 0xffffffa0
78 #define UBC_BAMRB 0xffffffa4
79 #define UBC_BBRB 0xffffffa8
80 #define UBC_BASRB 0xffffffe8
81 #define UBC_BDRB 0xffffff90
82 #define UBC_BDMRB 0xffffff94
83 #define UBC_BRCR 0xffffff98
84 #elif defined(__SH4__)
85 #define UBC_BARA 0xff200000
86 #define UBC_BAMRA 0xff200004
87 #define UBC_BBRA 0xff200008
88 #define UBC_BASRA 0xff000014
89 #define UBC_BARB 0xff20000c
90 #define UBC_BAMRB 0xff200010
91 #define UBC_BBRB 0xff200014
92 #define UBC_BASRB 0xff000018
93 #define UBC_BDRB 0xff200018
94 #define UBC_BDMRB 0xff20001c
95 #define UBC_BRCR 0xff200020
96 #endif
97
98 #define BAMR_ASID (1 << 2)
99 #define BAMR_NONE 0
100 #define BAMR_10 0x1
101 #define BAMR_12 0x2
102 #define BAMR_ALL 0x3
103 #define BAMR_16 0x8
104 #define BAMR_20 0x9
105
106 #define BBR_INST (1 << 4)
107 #define BBR_DATA (2 << 4)
108 #define BBR_READ (1 << 2)
109 #define BBR_WRITE (2 << 4)
110 #define BBR_BYTE 0x1
111 #define BBR_HALF 0x2
112 #define BBR_LONG 0x3
113 #define BBR_QUAD (1 << 6)
114
115 #define BRCR_CMFA (1 << 15)
116 #define BRCR_CMFB (1 << 14)
117 #define BRCR_PCBA (1 << 10) /* 1: after execution */
118 #define BRCR_DBEB (1 << 7)
119 #define BRCR_PCBB (1 << 6)
120 #define BRCR_SEQ (1 << 3)
121 #define BRCR_UBDE (1 << 0)
122 #endif
123
124 #endif /* __ASM_SH_PTRACE_H */
125
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