1 /* $Id: ide.h,v 1.6 2000/05/27 00:49:37 davem Exp $
2 * ide.h: SPARC PCI specific IDE glue.
3 *
4 * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
5 * Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be)
6 * Adaptation from sparc64 version to sparc by Pete Zaitcev.
7 */
8
9 #ifndef _SPARC_IDE_H
10 #define _SPARC_IDE_H
11
12 #ifdef __KERNEL__
13
14 #include <linux/config.h>
15 #include <asm/pgtable.h>
16 #include <asm/io.h>
17 #include <asm/hdreg.h>
18 #include <asm/psr.h>
19
20 #undef MAX_HWIFS
21 #define MAX_HWIFS 2
22
23 #define ide__sti() __sti()
24
25 static __inline__ int ide_default_irq(ide_ioreg_t base)
26 {
27 return 0;
28 }
29
30 static __inline__ ide_ioreg_t ide_default_io_base(int index)
31 {
32 return 0;
33 }
34
35 /*
36 * Doing any sort of ioremap() here does not work
37 * because this function may be called with null aguments.
38 */
39 static __inline__ void ide_init_hwif_ports(hw_regs_t *hw, ide_ioreg_t data_port, ide_ioreg_t ctrl_port, int *irq)
40 {
41 ide_ioreg_t reg = data_port;
42 int i;
43
44 for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
45 hw->io_ports[i] = reg;
46 reg += 1;
47 }
48 if (ctrl_port) {
49 hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
50 } else {
51 hw->io_ports[IDE_CONTROL_OFFSET] = 0;
52 }
53 if (irq != NULL)
54 *irq = 0;
55 hw->io_ports[IDE_IRQ_OFFSET] = 0;
56 }
57
58 /*
59 * This registers the standard ports for this architecture with the IDE
60 * driver.
61 */
62 static __inline__ void ide_init_default_hwifs(void)
63 {
64 #ifndef CONFIG_BLK_DEV_IDEPCI
65 hw_regs_t hw;
66 int index;
67
68 for (index = 0; index < MAX_HWIFS; index++) {
69 ide_init_hwif_ports(&hw, ide_default_io_base(index), 0, NULL);
70 hw.irq = ide_default_irq(ide_default_io_base(index));
71 ide_register_hw(&hw, NULL);
72 }
73 #endif /* CONFIG_BLK_DEV_IDEPCI */
74 }
75
76 typedef union {
77 unsigned int all : 8; /* all of the bits together */
78 struct {
79 unsigned int bit7 : 1;
80 unsigned int lba : 1;
81 unsigned int bit5 : 1;
82 unsigned int unit : 1;
83 unsigned int head : 4;
84 } b;
85 } select_t;
86
87 static __inline__ int ide_request_irq(unsigned int irq,
88 void (*handler)(int, void *, struct pt_regs *),
89 unsigned long flags, const char *name, void *devid)
90 {
91 return request_irq(irq, handler, SA_SHIRQ, name, devid);
92 }
93
94 static __inline__ void ide_free_irq(unsigned int irq, void *dev_id)
95 {
96 free_irq(irq, dev_id);
97 }
98
99 static __inline__ int ide_check_region(ide_ioreg_t base, unsigned int size)
100 {
101 /* We leave these empty because pcic.c calls sparc_alloc_io() */
102 return 0;
103 }
104
105 static __inline__ void ide_request_region(ide_ioreg_t base, unsigned int size,
106 const char *name)
107 {
108 }
109
110 static __inline__ void ide_release_region(ide_ioreg_t base, unsigned int size)
111 {
112 }
113
114 #undef SUPPORT_SLOW_DATA_PORTS
115 #define SUPPORT_SLOW_DATA_PORTS 0
116
117 #undef SUPPORT_VLB_SYNC
118 #define SUPPORT_VLB_SYNC 0
119
120 #undef HD_DATA
121 #define HD_DATA ((ide_ioreg_t)0)
122
123 /* From m68k code... */
124
125 #ifdef insl
126 #undef insl
127 #endif
128 #ifdef outsl
129 #undef outsl
130 #endif
131 #ifdef insw
132 #undef insw
133 #endif
134 #ifdef outsw
135 #undef outsw
136 #endif
137
138 #define insl(data_reg, buffer, wcount) insw(data_reg, buffer, (wcount)<<1)
139 #define outsl(data_reg, buffer, wcount) outsw(data_reg, buffer, (wcount)<<1)
140
141 #define insw(port, buf, nr) ide_insw((port), (buf), (nr))
142 #define outsw(port, buf, nr) ide_outsw((port), (buf), (nr))
143
144 static __inline__ void ide_insw(unsigned long port,
145 void *dst,
146 unsigned long count)
147 {
148 volatile unsigned short *data_port;
149 /* unsigned long end = (unsigned long)dst + (count << 1); */ /* P3 */
150 u16 *ps = dst;
151 u32 *pi;
152
153 data_port = (volatile unsigned short *)port;
154
155 if(((unsigned long)ps) & 0x2) {
156 *ps++ = *data_port;
157 count--;
158 }
159 pi = (u32 *)ps;
160 while(count >= 2) {
161 u32 w;
162
163 w = (*data_port) << 16;
164 w |= (*data_port);
165 *pi++ = w;
166 count -= 2;
167 }
168 ps = (u16 *)pi;
169 if(count)
170 *ps++ = *data_port;
171
172 /* __flush_dcache_range((unsigned long)dst, end); */ /* P3 see hme */
173 }
174
175 static __inline__ void ide_outsw(unsigned long port,
176 const void *src,
177 unsigned long count)
178 {
179 volatile unsigned short *data_port;
180 /* unsigned long end = (unsigned long)src + (count << 1); */
181 const u16 *ps = src;
182 const u32 *pi;
183
184 data_port = (volatile unsigned short *)port;
185
186 if(((unsigned long)src) & 0x2) {
187 *data_port = *ps++;
188 count--;
189 }
190 pi = (const u32 *)ps;
191 while(count >= 2) {
192 u32 w;
193
194 w = *pi++;
195 *data_port = (w >> 16);
196 *data_port = w;
197 count -= 2;
198 }
199 ps = (const u16 *)pi;
200 if(count)
201 *data_port = *ps;
202
203 /* __flush_dcache_range((unsigned long)src, end); */ /* P3 see hme */
204 }
205
206 #define T_CHAR (0x0000) /* char: don't touch */
207 #define T_SHORT (0x4000) /* short: 12 -> 21 */
208 #define T_INT (0x8000) /* int: 1234 -> 4321 */
209 #define T_TEXT (0xc000) /* text: 12 -> 21 */
210
211 #define T_MASK_TYPE (0xc000)
212 #define T_MASK_COUNT (0x3fff)
213
214 #define D_CHAR(cnt) (T_CHAR | (cnt))
215 #define D_SHORT(cnt) (T_SHORT | (cnt))
216 #define D_INT(cnt) (T_INT | (cnt))
217 #define D_TEXT(cnt) (T_TEXT | (cnt))
218
219 static u_short driveid_types[] = {
220 D_SHORT(10), /* config - vendor2 */
221 D_TEXT(20), /* serial_no */
222 D_SHORT(3), /* buf_type - ecc_bytes */
223 D_TEXT(48), /* fw_rev - model */
224 D_CHAR(2), /* max_multsect - vendor3 */
225 D_SHORT(1), /* dword_io */
226 D_CHAR(2), /* vendor4 - capability */
227 D_SHORT(1), /* reserved50 */
228 D_CHAR(4), /* vendor5 - tDMA */
229 D_SHORT(4), /* field_valid - cur_sectors */
230 D_INT(1), /* cur_capacity */
231 D_CHAR(2), /* multsect - multsect_valid */
232 D_INT(1), /* lba_capacity */
233 D_SHORT(194) /* dma_1word - reservedyy */
234 };
235
236 #define num_driveid_types (sizeof(driveid_types)/sizeof(*driveid_types))
237
238 static __inline__ void ide_fix_driveid(struct hd_driveid *id)
239 {
240 u_char *p = (u_char *)id;
241 int i, j, cnt;
242 u_char t;
243
244 for (i = 0; i < num_driveid_types; i++) {
245 cnt = driveid_types[i] & T_MASK_COUNT;
246 switch (driveid_types[i] & T_MASK_TYPE) {
247 case T_CHAR:
248 p += cnt;
249 break;
250 case T_SHORT:
251 for (j = 0; j < cnt; j++) {
252 t = p[0];
253 p[0] = p[1];
254 p[1] = t;
255 p += 2;
256 }
257 break;
258 case T_INT:
259 for (j = 0; j < cnt; j++) {
260 t = p[0];
261 p[0] = p[3];
262 p[3] = t;
263 t = p[1];
264 p[1] = p[2];
265 p[2] = t;
266 p += 4;
267 }
268 break;
269 case T_TEXT:
270 for (j = 0; j < cnt; j += 2) {
271 t = p[0];
272 p[0] = p[1];
273 p[1] = t;
274 p += 2;
275 }
276 break;
277 };
278 }
279 }
280
281 /*
282 * The following are not needed for the non-m68k ports
283 */
284 #define ide_ack_intr(hwif) (1)
285 /* #define ide_ack_intr(hwif) ((hwif)->hw.ack_intr ? (hwif)->hw.ack_intr(hwif) : 1) */
286 #define ide_release_lock(lock) do {} while (0)
287 #define ide_get_lock(lock, hdlr, data) do {} while (0)
288
289 #endif /* __KERNEL__ */
290
291 #endif /* _SPARC_IDE_H */
292
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