1 /* $Id: psr.h,v 1.15 1997/10/04 08:54:22 ecd Exp $
2 * psr.h: This file holds the macros for masking off various parts of
3 * the processor status register on the Sparc. This is valid
4 * for Version 8. On the V9 this is renamed to the PSTATE
5 * register and its members are accessed as fields like
6 * PSTATE.PRIV for the current CPU privilege level.
7 *
8 * Copyright (C) 1994 David S. Miller (davem@caip.rutgers.edu)
9 */
10
11 #ifndef __LINUX_SPARC_PSR_H
12 #define __LINUX_SPARC_PSR_H
13
14 /* The Sparc PSR fields are laid out as the following:
15 *
16 * ------------------------------------------------------------------------
17 * | impl | vers | icc | resv | EC | EF | PIL | S | PS | ET | CWP |
18 * | 31-28 | 27-24 | 23-20 | 19-14 | 13 | 12 | 11-8 | 7 | 6 | 5 | 4-0 |
19 * ------------------------------------------------------------------------
20 */
21 #define PSR_CWP 0x0000001f /* current window pointer */
22 #define PSR_ET 0x00000020 /* enable traps field */
23 #define PSR_PS 0x00000040 /* previous privilege level */
24 #define PSR_S 0x00000080 /* current privilege level */
25 #define PSR_PIL 0x00000f00 /* processor interrupt level */
26 #define PSR_EF 0x00001000 /* enable floating point */
27 #define PSR_EC 0x00002000 /* enable co-processor */
28 #define PSR_LE 0x00008000 /* SuperSparcII little-endian */
29 #define PSR_ICC 0x00f00000 /* integer condition codes */
30 #define PSR_C 0x00100000 /* carry bit */
31 #define PSR_V 0x00200000 /* overflow bit */
32 #define PSR_Z 0x00400000 /* zero bit */
33 #define PSR_N 0x00800000 /* negative bit */
34 #define PSR_VERS 0x0f000000 /* cpu-version field */
35 #define PSR_IMPL 0xf0000000 /* cpu-implementation field */
36
37 #ifdef __KERNEL__
38
39 #ifndef __ASSEMBLY__
40 /* Get the %psr register. */
41 extern __inline__ unsigned int get_psr(void)
42 {
43 unsigned int psr;
44 __asm__ __volatile__(
45 "rd %%psr, %0\n\t"
46 "nop\n\t"
47 "nop\n\t"
48 "nop\n\t"
49 : "=r" (psr)
50 : /* no inputs */
51 : "memory");
52
53 return psr;
54 }
55
56 extern __inline__ void put_psr(unsigned int new_psr)
57 {
58 __asm__ __volatile__(
59 "wr %0, 0x0, %%psr\n\t"
60 "nop\n\t"
61 "nop\n\t"
62 "nop\n\t"
63 : /* no outputs */
64 : "r" (new_psr)
65 : "memory", "cc");
66 }
67
68 /* Get the %fsr register. Be careful, make sure the floating point
69 * enable bit is set in the %psr when you execute this or you will
70 * incur a trap.
71 */
72
73 extern unsigned int fsr_storage;
74
75 extern __inline__ unsigned int get_fsr(void)
76 {
77 unsigned int fsr = 0;
78
79 __asm__ __volatile__(
80 "st %%fsr, %1\n\t"
81 "ld %1, %0\n\t"
82 : "=r" (fsr)
83 : "m" (fsr_storage));
84
85 return fsr;
86 }
87
88 #endif /* !(__ASSEMBLY__) */
89
90 #endif /* (__KERNEL__) */
91
92 #endif /* !(__LINUX_SPARC_PSR_H) */
93
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