1 /* smp.h: Sparc specific SMP stuff.
2 *
3 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
4 */
5
6 #ifndef _SPARC_SMP_H
7 #define _SPARC_SMP_H
8
9 #include <linux/config.h>
10 #include <linux/threads.h>
11 #include <asm/head.h>
12 #include <asm/btfixup.h>
13
14 #ifndef __ASSEMBLY__
15 /* PROM provided per-processor information we need
16 * to start them all up.
17 */
18
19 struct prom_cpuinfo {
20 int prom_node;
21 int mid;
22 };
23 extern int linux_num_cpus; /* number of CPUs probed */
24
25 #endif /* !(__ASSEMBLY__) */
26
27 #ifdef CONFIG_SMP
28
29 #ifndef __ASSEMBLY__
30
31 #include <asm/ptrace.h>
32 #include <asm/asi.h>
33
34 extern struct prom_cpuinfo linux_cpus[NR_CPUS];
35
36 /* Per processor Sparc parameters we need. */
37
38 struct cpuinfo_sparc {
39 unsigned long udelay_val; /* that's it */
40 unsigned short next;
41 unsigned short mid;
42 };
43
44 extern struct cpuinfo_sparc cpu_data[NR_CPUS];
45 extern unsigned long cpu_offset[NR_CPUS];
46
47 /*
48 * Private routines/data
49 */
50
51 extern int smp_found_cpus;
52 extern unsigned char boot_cpu_id;
53 extern unsigned long cpu_present_map;
54
55 typedef void (*smpfunc_t)(unsigned long, unsigned long, unsigned long,
56 unsigned long, unsigned long);
57
58 /*
59 * General functions that each host system must provide.
60 */
61
62 void sun4m_init_smp(void);
63 void sun4d_init_smp(void);
64
65 void smp_callin(void);
66 void smp_boot_cpus(void);
67 void smp_store_cpu_info(int);
68
69 int smp_bogo_info(char *buf);
70 int smp_info(char *buf);
71
72 BTFIXUPDEF_CALL(void, smp_cross_call, smpfunc_t, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long)
73 BTFIXUPDEF_CALL(void, smp_message_pass, int, int, unsigned long, int)
74 BTFIXUPDEF_CALL(int, __smp_processor_id, void)
75 BTFIXUPDEF_BLACKBOX(smp_processor_id)
76 BTFIXUPDEF_BLACKBOX(load_current)
77
78 #define smp_cross_call(func,arg1,arg2,arg3,arg4,arg5) BTFIXUP_CALL(smp_cross_call)(func,arg1,arg2,arg3,arg4,arg5)
79 #define smp_message_pass(target,msg,data,wait) BTFIXUP_CALL(smp_message_pass)(target,msg,data,wait)
80
81 extern __inline__ void xc0(smpfunc_t func) { smp_cross_call(func, 0, 0, 0, 0, 0); }
82 extern __inline__ void xc1(smpfunc_t func, unsigned long arg1)
83 { smp_cross_call(func, arg1, 0, 0, 0, 0); }
84 extern __inline__ void xc2(smpfunc_t func, unsigned long arg1, unsigned long arg2)
85 { smp_cross_call(func, arg1, arg2, 0, 0, 0); }
86 extern __inline__ void xc3(smpfunc_t func, unsigned long arg1, unsigned long arg2,
87 unsigned long arg3)
88 { smp_cross_call(func, arg1, arg2, arg3, 0, 0); }
89 extern __inline__ void xc4(smpfunc_t func, unsigned long arg1, unsigned long arg2,
90 unsigned long arg3, unsigned long arg4)
91 { smp_cross_call(func, arg1, arg2, arg3, arg4, 0); }
92 extern __inline__ void xc5(smpfunc_t func, unsigned long arg1, unsigned long arg2,
93 unsigned long arg3, unsigned long arg4, unsigned long arg5)
94 { smp_cross_call(func, arg1, arg2, arg3, arg4, arg5); }
95
96 extern __inline__ int smp_call_function(void (*func)(void *info), void *info, int nonatomic, int wait)
97 {
98 xc1((smpfunc_t)func, (unsigned long)info);
99 return 0;
100 }
101
102 extern __volatile__ int __cpu_number_map[NR_CPUS];
103 extern __volatile__ int __cpu_logical_map[NR_CPUS];
104 extern unsigned long smp_proc_in_lock[NR_CPUS];
105
106 extern __inline__ int cpu_logical_map(int cpu)
107 {
108 return __cpu_logical_map[cpu];
109 }
110 extern __inline__ int cpu_number_map(int cpu)
111 {
112 return __cpu_number_map[cpu];
113 }
114
115 extern __inline__ int hard_smp4m_processor_id(void)
116 {
117 int cpuid;
118
119 __asm__ __volatile__("rd %%tbr, %0\n\t"
120 "srl %0, 12, %0\n\t"
121 "and %0, 3, %0\n\t" :
122 "=&r" (cpuid));
123 return cpuid;
124 }
125
126 extern __inline__ int hard_smp4d_processor_id(void)
127 {
128 int cpuid;
129
130 __asm__ __volatile__("lda [%%g0] %1, %0\n\t" :
131 "=&r" (cpuid) : "i" (ASI_M_VIKING_TMP1));
132 return cpuid;
133 }
134
135 #ifndef MODULE
136 extern __inline__ int hard_smp_processor_id(void)
137 {
138 int cpuid;
139
140 /* Black box - sun4m
141 __asm__ __volatile__("rd %%tbr, %0\n\t"
142 "srl %0, 12, %0\n\t"
143 "and %0, 3, %0\n\t" :
144 "=&r" (cpuid));
145 - sun4d
146 __asm__ __volatile__("lda [%g0] ASI_M_VIKING_TMP1, %0\n\t"
147 "nop; nop" :
148 "=&r" (cpuid));
149 See btfixup.h and btfixupprep.c to understand how a blackbox works.
150 */
151 __asm__ __volatile__("sethi %%hi(___b_smp_processor_id), %0\n\t"
152 "sethi %%hi(boot_cpu_id), %0\n\t"
153 "ldub [%0 + %%lo(boot_cpu_id)], %0\n\t" :
154 "=&r" (cpuid));
155 return cpuid;
156 }
157 #else
158 extern __inline__ int hard_smp_processor_id(void)
159 {
160 int cpuid;
161
162 __asm__ __volatile__("mov %%o7, %%g1\n\t"
163 "call ___f___smp_processor_id\n\t"
164 " nop\n\t"
165 "mov %%g2, %0\n\t" : "=r"(cpuid) : : "g1", "g2");
166 return cpuid;
167 }
168 #endif
169
170 #define smp_processor_id() hard_smp_processor_id()
171 /* XXX We really need to implement this now. -DaveM */
172 extern __inline__ void smp_send_reschedule(int cpu) { }
173 extern __inline__ void smp_send_stop(void) { }
174
175 #endif /* !(__ASSEMBLY__) */
176
177 /* Sparc specific messages. */
178 #define MSG_CROSS_CALL 0x0005 /* run func on cpus */
179
180 /* Empirical PROM processor mailbox constants. If the per-cpu mailbox
181 * contains something other than one of these then the ipi is from
182 * Linux's active_kernel_processor. This facility exists so that
183 * the boot monitor can capture all the other cpus when one catches
184 * a watchdog reset or the user enters the monitor using L1-A keys.
185 */
186 #define MBOX_STOPCPU 0xFB
187 #define MBOX_IDLECPU 0xFC
188 #define MBOX_IDLECPU2 0xFD
189 #define MBOX_STOPCPU2 0xFE
190
191 #define PROC_CHANGE_PENALTY 15
192
193 #endif /* !(CONFIG_SMP) */
194
195 #define NO_PROC_ID 0xFF
196
197 #endif /* !(_SPARC_SMP_H) */
198
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