1 /* $Id: viking.h,v 1.19 1997/04/20 14:11:48 ecd Exp $
2 * viking.h: Defines specific to the GNU/Viking MBUS module.
3 * This is SRMMU stuff.
4 *
5 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
6 */
7 #ifndef _SPARC_VIKING_H
8 #define _SPARC_VIKING_H
9
10 #include <asm/asi.h>
11 #include <asm/mxcc.h>
12 #include <asm/pgtsrmmu.h>
13
14 /* Bits in the SRMMU control register for GNU/Viking modules.
15 *
16 * -----------------------------------------------------------
17 * |impl-vers| RSV |TC|AC|SP|BM|PC|MBM|SB|IC|DC|PSO|RSV|NF|ME|
18 * -----------------------------------------------------------
19 * 31 24 23-17 16 15 14 13 12 11 10 9 8 7 6-2 1 0
20 *
21 * TC: Tablewalk Cacheable -- 0 = Twalks are not cacheable in E-cache
22 * 1 = Twalks are cacheable in E-cache
23 *
24 * GNU/Viking will only cache tablewalks in the E-cache (mxcc) if present
25 * and never caches them internally (or so states the docs). Therefore
26 * for machines lacking an E-cache (ie. in MBUS mode) this bit must
27 * remain cleared.
28 *
29 * AC: Alternate Cacheable -- 0 = Passthru physical accesses not cacheable
30 * 1 = Passthru physical accesses cacheable
31 *
32 * This indicates whether accesses are cacheable when no cachable bit
33 * is present in the pte when the processor is in boot-mode or the
34 * access does not need pte's for translation (ie. pass-thru ASI's).
35 * "Cachable" is only referring to E-cache (if present) and not the
36 * on chip split I/D caches of the GNU/Viking.
37 *
38 * SP: SnooP Enable -- 0 = bus snooping off, 1 = bus snooping on
39 *
40 * This enables snooping on the GNU/Viking bus. This must be on
41 * for the hardware cache consistency mechanisms of the GNU/Viking
42 * to work at all. On non-mxcc GNU/Viking modules the split I/D
43 * caches will snoop regardless of whether they are enabled, this
44 * takes care of the case where the I or D or both caches are turned
45 * off yet still contain valid data. Note also that this bit does
46 * not affect GNU/Viking store-buffer snoops, those happen if the
47 * store-buffer is enabled no matter what.
48 *
49 * BM: Boot Mode -- 0 = not in boot mode, 1 = in boot mode
50 *
51 * This indicates whether the GNU/Viking is in boot-mode or not,
52 * if it is then all instruction fetch physical addresses are
53 * computed as 0xff0000000 + low 28 bits of requested address.
54 * GNU/Viking boot-mode does not affect data accesses. Also,
55 * in boot mode instruction accesses bypass the split on chip I/D
56 * caches, they may be cached by the GNU/MXCC if present and enabled.
57 *
58 * MBM: MBus Mode -- 0 = not in MBus mode, 1 = in MBus mode
59 *
60 * This indicated the GNU/Viking configuration present. If in
61 * MBUS mode, the GNU/Viking lacks a GNU/MXCC E-cache. If it is
62 * not then the GNU/Viking is on a module VBUS connected directly
63 * to a GNU/MXCC cache controller. The GNU/MXCC can be thus connected
64 * to either an GNU/MBUS (sun4m) or the packet-switched GNU/XBus (sun4d).
65 *
66 * SB: StoreBuffer enable -- 0 = store buffer off, 1 = store buffer on
67 *
68 * The GNU/Viking store buffer allows the chip to continue execution
69 * after a store even if the data cannot be placed in one of the
70 * caches during that cycle. If disabled, all stores operations
71 * occur synchronously.
72 *
73 * IC: Instruction Cache -- 0 = off, 1 = on
74 * DC: Data Cache -- 0 = off, 1 = 0n
75 *
76 * These bits enable the on-cpu GNU/Viking split I/D caches. Note,
77 * as mentioned above, these caches will snoop the bus in GNU/MBUS
78 * configurations even when disabled to avoid data corruption.
79 *
80 * NF: No Fault -- 0 = faults generate traps, 1 = faults don't trap
81 * ME: MMU enable -- 0 = mmu not translating, 1 = mmu translating
82 *
83 */
84
85 #define VIKING_MMUENABLE 0x00000001
86 #define VIKING_NOFAULT 0x00000002
87 #define VIKING_PSO 0x00000080
88 #define VIKING_DCENABLE 0x00000100 /* Enable data cache */
89 #define VIKING_ICENABLE 0x00000200 /* Enable instruction cache */
90 #define VIKING_SBENABLE 0x00000400 /* Enable store buffer */
91 #define VIKING_MMODE 0x00000800 /* MBUS mode */
92 #define VIKING_PCENABLE 0x00001000 /* Enable parity checking */
93 #define VIKING_BMODE 0x00002000
94 #define VIKING_SPENABLE 0x00004000 /* Enable bus cache snooping */
95 #define VIKING_ACENABLE 0x00008000 /* Enable alternate caching */
96 #define VIKING_TCENABLE 0x00010000 /* Enable table-walks to be cached */
97 #define VIKING_DPENABLE 0x00040000 /* Enable the data prefetcher */
98
99 /*
100 * GNU/Viking Breakpoint Action Register fields.
101 */
102 #define VIKING_ACTION_MIX 0x00001000 /* Enable multiple instructions */
103
104 /*
105 * GNU/Viking Cache Tags.
106 */
107 #define VIKING_PTAG_VALID 0x01000000 /* Cache block is valid */
108 #define VIKING_PTAG_DIRTY 0x00010000 /* Block has been modified */
109 #define VIKING_PTAG_SHARED 0x00000100 /* Shared with some other cache */
110
111 #ifndef __ASSEMBLY__
112
113 extern __inline__ void viking_flush_icache(void)
114 {
115 __asm__ __volatile__("sta %%g0, [%%g0] %0\n\t" : :
116 "i" (ASI_M_IC_FLCLEAR));
117 }
118
119 extern __inline__ void viking_flush_dcache(void)
120 {
121 __asm__ __volatile__("sta %%g0, [%%g0] %0\n\t" : :
122 "i" (ASI_M_DC_FLCLEAR));
123 }
124
125 extern __inline__ void viking_unlock_icache(void)
126 {
127 __asm__ __volatile__("sta %%g0, [%0] %1\n\t" : :
128 "r" (0x80000000), "i" (ASI_M_IC_FLCLEAR));
129 }
130
131 extern __inline__ void viking_unlock_dcache(void)
132 {
133 __asm__ __volatile__("sta %%g0, [%0] %1\n\t" : :
134 "r" (0x80000000), "i" (ASI_M_DC_FLCLEAR));
135 }
136
137 extern __inline__ void viking_set_bpreg(unsigned long regval)
138 {
139 __asm__ __volatile__("sta %0, [%%g0] %1\n\t" : :
140 "r" (regval),
141 "i" (ASI_M_ACTION));
142 }
143
144 extern __inline__ unsigned long viking_get_bpreg(void)
145 {
146 unsigned long regval;
147
148 __asm__ __volatile__("lda [%%g0] %1, %0\n\t" :
149 "=r" (regval) :
150 "i" (ASI_M_ACTION));
151 return regval;
152 }
153
154 extern __inline__ void viking_get_dcache_ptag(int set, int block,
155 unsigned long *data)
156 {
157 unsigned long ptag = ((set & 0x7f) << 5) | ((block & 0x3) << 26) |
158 0x80000000;
159 unsigned long info, page;
160
161 __asm__ __volatile__ ("ldda [%2] %3, %%g2\n\t"
162 "or %%g0, %%g2, %0\n\t"
163 "or %%g0, %%g3, %1\n\t" :
164 "=r" (info), "=r" (page) :
165 "r" (ptag), "i" (ASI_M_DATAC_TAG) :
166 "g2", "g3");
167 data[0] = info;
168 data[1] = page;
169 }
170
171 extern __inline__ void viking_mxcc_turn_off_parity(unsigned long *mregp,
172 unsigned long *mxcc_cregp)
173 {
174 unsigned long mreg = *mregp;
175 unsigned long mxcc_creg = *mxcc_cregp;
176
177 mreg &= ~(VIKING_PCENABLE);
178 mxcc_creg &= ~(MXCC_CTL_PARE);
179
180 __asm__ __volatile__ ("set 1f, %%g2\n\t"
181 "andcc %%g2, 4, %%g0\n\t"
182 "bne 2f\n\t"
183 " nop\n"
184 "1:\n\t"
185 "sta %0, [%%g0] %3\n\t"
186 "sta %1, [%2] %4\n\t"
187 "b 1f\n\t"
188 " nop\n\t"
189 "nop\n"
190 "2:\n\t"
191 "sta %0, [%%g0] %3\n\t"
192 "sta %1, [%2] %4\n"
193 "1:\n\t" : :
194 "r" (mreg), "r" (mxcc_creg),
195 "r" (MXCC_CREG), "i" (ASI_M_MMUREGS),
196 "i" (ASI_M_MXCC) : "g2", "cc");
197 *mregp = mreg;
198 *mxcc_cregp = mxcc_creg;
199 }
200
201 extern __inline__ unsigned long viking_hwprobe(unsigned long vaddr)
202 {
203 unsigned long val;
204
205 vaddr &= PAGE_MASK;
206 /* Probe all MMU entries. */
207 __asm__ __volatile__("lda [%1] %2, %0\n\t" :
208 "=r" (val) :
209 "r" (vaddr | 0x400), "i" (ASI_M_FLUSH_PROBE));
210 if (!val)
211 return 0;
212
213 /* Probe region. */
214 __asm__ __volatile__("lda [%1] %2, %0\n\t" :
215 "=r" (val) :
216 "r" (vaddr | 0x200), "i" (ASI_M_FLUSH_PROBE));
217 if ((val & SRMMU_ET_MASK) == SRMMU_ET_PTE) {
218 vaddr &= ~SRMMU_PGDIR_MASK;
219 vaddr >>= PAGE_SHIFT;
220 return val | (vaddr << 8);
221 }
222
223 /* Probe segment. */
224 __asm__ __volatile__("lda [%1] %2, %0\n\t" :
225 "=r" (val) :
226 "r" (vaddr | 0x100), "i" (ASI_M_FLUSH_PROBE));
227 if ((val & SRMMU_ET_MASK) == SRMMU_ET_PTE) {
228 vaddr &= ~SRMMU_PMD_MASK;
229 vaddr >>= PAGE_SHIFT;
230 return val | (vaddr << 8);
231 }
232
233 /* Probe page. */
234 __asm__ __volatile__("lda [%1] %2, %0\n\t" :
235 "=r" (val) :
236 "r" (vaddr), "i" (ASI_M_FLUSH_PROBE));
237 return val;
238 }
239
240 #endif /* !__ASSEMBLY__ */
241
242 #endif /* !(_SPARC_VIKING_H) */
243
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