~ [ source navigation ] ~ [ diff markup ] ~ [ identifier search ] ~ [ freetext search ] ~ [ file search ] ~

Linux Cross Reference
Linux/include/asm-sparc64/cache.h

Version: ~ [ 2.4.0 ] ~
Architecture: ~ [ i386 ] ~ [ alpha ] ~ [ m68k ] ~ [ mips ] ~ [ ppc ] ~ [ sparc ] ~ [ sparc64 ] ~ 
  1 /*
  2  * include/asm-sparc64/cache.h
  3  */
  4 #ifndef __ARCH_SPARC64_CACHE_H
  5 #define __ARCH_SPARC64_CACHE_H
  6 
  7 /* bytes per L1 cache line */
  8 #define        L1_CACHE_BYTES           32 /* Two 16-byte sub-blocks per line. */
  9 
 10 #define        L1_CACHE_ALIGN(x)       (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1))
 11 
 12 #define        SMP_CACHE_BYTES          64 /* L2 cache line size. */
 13 
 14 #ifdef MODULE
 15 #define __cacheline_aligned __attribute__((__aligned__(SMP_CACHE_BYTES)))
 16 #else
 17 #define __cacheline_aligned                                     \
 18   __attribute__((__aligned__(SMP_CACHE_BYTES),                  \
 19                  __section__(".data.cacheline_aligned")))
 20 #endif
 21 
 22 #endif
 23
~ [ source navigation ] ~ [ diff markup ] ~ [ identifier search ] ~ [ freetext search ] ~ [ file search ] ~
This page was automatically generated by the LXR engine.
Visit the LXR main site for more information.